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HCTS161AHMSR の電気的特性と機能

HCTS161AHMSRのメーカーはIntersil Corporationです、この部品の機能は「Radiation Hardened Synchronous Counter」です。


製品の詳細 ( Datasheet PDF )

部品番号 HCTS161AHMSR
部品説明 Radiation Hardened Synchronous Counter
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HCTS161AHMSR Datasheet, HCTS161AHMSR PDF,ピン配置, 機能
HCTS161AMS
September 1995
Radiation Hardened
Synchronous Counter
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• Minimum LET for SEU Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
-VIL = 0.8V Max
-VIH = VCC/2V Min
• Input Current Levels Ii 5µA at VOL, VOH
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
MR 1
CP 2
P0 3
P1 4
P2 5
P3 6
PE 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9 SPE
Description
The Intersil HCTS161AMS high-reliability high-speed presettable
four-bit binary synchronous counter features asynchronous reset
and look-ahead carry logic. The HCTS161AMS has an active-low
master reset to zero, MR. A low level at the synchronous parallel
enable, SPE, disables counting and allows data at the preset
inputs (P0 - P3) to load the counter. The data is latched to the
outputs on the positive edge of the clock input, CP. The
HCTS161AMS has two count enable pins, PE and TE. TE also
controls the terminal count output, TC. The terminal count output
indicates a maximum count for one clock pulse and is used to
enable the next cascaded stage to count.
The HCTS161AMS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS161AMS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
MR
CP
P0
P1
P2
P3
PE
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Ordering Information
PART NUMBER
HCTS161ADMSR
HCTS161AKMSR
HCTS161AD/Sample
HCTS161AK/Sample
HCTS161AHMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518888
File Number 2144.2

1 Page





HCTS161AHMSR pdf, ピン配列
Specifications HCTS161AMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
CP to Qn
Propagation Delay
CP to TC
Propagation Delay
TE to TC
Propagation Delay
MR to Q
Propagation Delay
MR to TC
SYMBOL
TPLH1
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHL1
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPLH2
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHL2
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPLH3
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHL3
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHL4
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHL5
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
LIMITS
MIN MAX UNITS
2 27 ns
2 29 ns
2 27 ns
2 29 ns
2 28 ns
2 31 ns
2 29 ns
2 33 ns
2 20 ns
2 21 ns
2 25
2 29
2 38 ns
2 45 ns
2 44 ns
2 51 ns
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
Pulse Width Time CP
Pulse Width Time MR
Setup Time Pn to CP
Setup Time PE to CP or TE
Setup Time SPE to CP
Hold Time Pn to CP
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
SYMBOL
CPD
(NOTE 1)
CONDITIONS
VCC = 5.0V, VIH = 5.0,
VIL = 0.0V, f = 1MHz
CIN VCC = 5.0V, VIH = 5.0,
VIL = 0.0V, f = 1MHz
TW VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TW VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TSU
VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TSU
VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TSU
VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TSU
VCC = 4.5V, VIH = 4.5,
VIL = 0.0V,
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
LIMITS
MIN MAX
- 231
- 285
- 10
- 10
16 -
24 -
20 -
30 -
10 -
15 -
13 -
20 -
12 -
18 -
5-
5-
UNITS
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Spec Number 518888
3


3Pages


HCTS161AHMSR 電子部品, 半導体
HCTS161AMS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
11 - 15
1 - 10
-
16 - -
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
11 - 15
8
-
1 - 7, 9, 10, 16
-
-
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
- 4, 6, 8
11 - 15
1, 3, 5, 7, 9, 10, 16
2
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 1kΩ ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
11 - 15
8
1 - 7, 9, 10, 16
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518888
6

6 Page



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部品番号部品説明メーカ
HCTS161AHMSR

Radiation Hardened Synchronous Counter

Intersil Corporation
Intersil Corporation


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