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IPD30N08S2L-21 の電気的特性と機能

IPD30N08S2L-21のメーカーはInfineonです、この部品の機能は「Power-Transistor」です。


製品の詳細 ( Datasheet PDF )

部品番号 IPD30N08S2L-21
部品説明 Power-Transistor
メーカ Infineon
ロゴ Infineon ロゴ 




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IPD30N08S2L-21 Datasheet, IPD30N08S2L-21 PDF,ピン配置, 機能
OptiMOS® Power-Transistor
Features
• N-channel Logic Level - Enhancement mode
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
Green package (lead free)
• Ultra low Rds(on)
• 100% Avalanche tested
IPD30N08S2L-21
Product Summary
V DS
R DS(on),max
ID
75 V
20.5 m
30 A
PG-TO252-3-11
Type
IPD30N08S2L-21
Package
Marking
PG-TO252-3-11 2N08L21
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Continuous drain current
I D T C=25 °C, V GS=10 V1)
T C=100 °C,
V GS=10 V2)
Pulsed drain current2)
I D,pulse T C=25 °C
Avalanche energy, single pulse
E AS I D=30A
Gate source voltage
V GS
Power dissipation
P tot T C=25 °C
Operating and storage temperature T j, T stg
IEC climatic category; DIN IEC 68-1
Value
30
30
120
240
±20
136
-55 ... +175
55/175/56
Unit
A
mJ
V
W
°C
Rev. 1.0
page 1
2006-07-18

1 Page





IPD30N08S2L-21 pdf, ピン配列
IPD30N08S2L-21
Parameter
Symbol
Conditions
min.
Values
typ.
Unit
max.
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C iss
C oss
Crss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=40 V, V GS=10 V,
I D=30 A, R G=3.9
-
-
-
-
-
-
-
1650
400
190
9
30
44
11
- pF
-
-
- ns
-
-
-
Gate Charge Characteristics2)
Gate to source charge
Q gs
- 6 6.8 nC
Gate to drain charge
Gate charge total
Q gd V DD=60 V, I D=30 A,
Q g V GS=0 to 10 V
-
-
22 32
56 72
Gate plateau voltage
V plateau
- 3.5 - V
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
Diode forward voltage
IS
I S,pulse
V SD
T C=25 °C
V GS=0 V, I F=30 A,
T j=25 °C
- - 30 A
- - 120
- 0.9 1.3 V
Reverse recovery time2)
t rr
V R=40 V, I F=I S,
di F/dt =100 A/µs
- 50 - ns
Reverse recovery charge2)
Q rr
V R=40 V, I F=I S,
di F/dt =100 A/µs
- 120 - nC
1) Current limited by bondwire; with an RthJC = 1.1K/W the chip is able to carry ID= 54A at 25°C, for detailed
information see app.-note ANPS071E available at www.infineon.com/optimos
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2006-07-18


3Pages


IPD30N08S2L-21 電子部品, 半導体
9 Typ. Drain-source on-state resistance
R DS(ON) = f(T j)
parameter: I D = 25 A; VGS = 10 V
40
IPD30N08S2L-21
10 Typ. gate threshold voltage
V GS(th) = f(T j); V GS = V DS
parameter: I D
2.5
2
30
400 µA
1.5
80 µA
20
1
10
0.5
0
-60 -20 20
60 100 140 180
T j [°C]
0
-60 -20 20 60 100 140 180
T j [°C]
11 Typ. capacitances
C = f(V DS); V GS = 0 V; f = 1 MHz
104
12 Typical forward diode characteristicis
IF = f(VSD)
parameter: T j
103
Ciss
103 102
Coss
Crss
102 101
175 °C 25 °C
0 5 10 15 20 25 30
V DS [V]
100
0
0.2 0.4 0.6 0.8 1
V SD [V]
1.2 1.4 1.6
Rev. 1.0
page 6
2006-07-18

6 Page



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部品番号部品説明メーカ
IPD30N08S2L-21

Power-Transistor

Infineon
Infineon


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