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PDF HCS164K Data sheet ( Hoja de datos )

Número de pieza HCS164K
Descripción Radiation Hardened 8-Bit Serial-In/Parallel-Out Register
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! HCS164K Hoja de datos, Descripción, Manual

HCS164MS
September 1995
Radiation Hardened
8-Bit Serial-In/Parallel-Out Register
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up-Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
DS1 1
DS2 2
Q0 3
Q1 4
Q2 5
Q3 6
GND 7
14 VCC
13 Q7
12 Q6
11 Q5
10 Q4
9 MR
8 CP
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS164MS is a Radiation Hardened 8-bit
Serial-In/Parallel-Out Shift Register that has fully synchro-
nous serial data entry and an asynchronous master reset.
The HCS164MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
DS1
DS2
Q0
Q1
Q2
Q3
GND
1 14
2 13
3 12
4 11
5 10
69
78
VCC
Q7
Q6
Q5
Q4
MR
CP
The HCS164MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCS164DMSR
HCS164KMSR
HCS164D/Sample
HCS164K/Sample
HCS164HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
230
Spec Number 518756
File Number 2465.2

1 page




HCS164K pdf
Specifications HCS164MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
Noise Immunity
Functional Test
CP to Qn
MR to Qn
SYMBOL
(NOTES 1, 2)
CONDITIONS
FN VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
TPHL
TPLH
VCC = 4.5V
TPHL VCC = 4.5V
TEMPERATURE
+25oC
200K RAD
LIMITS
MIN MAX UNITS
---
+25oC
2 37 ns
+25oC
2 37 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
READ AND RECORD
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Group A (Note 1)
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11,
(Note 2)
Subgroup B-6
Sample/5005
1, 7, 9
Group D
Sample/5005
1, 7, 9
NOTES:
1. Alternate group A testing in accordance with method 5005 of MIL-STD-883 may be exercised.
2. Table 5 parameters only.
Spec Number 518756
234

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