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HCS161D の電気的特性と機能

HCS161DのメーカーはIntersil Corporationです、この部品の機能は「Radiation Hardened Synchronous Counter」です。


製品の詳細 ( Datasheet PDF )

部品番号 HCS161D
部品説明 Radiation Hardened Synchronous Counter
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HCS161D Datasheet, HCS161D PDF,ピン配置, 機能
HCS161MS
September 1995
Radiation Hardened
Synchronous Counter
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity 2 x 10-9 Error/Bit Day (Typ)
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS161MS is a Radiation Hardened 4-Input Binary;
synchronous counter featuring asynchronous reset and look-
ahead carry logic. The HCS161 has an active-low master reset to
zero, MR. A low level at the synchronous parallel enable, SPE,
disables counting and allows data at the preset inputs (p0 - p3) to
load the counter. The data is latched to the outputs on the posi-
tive edge of the clock input, CP. The HCS161MS has two count
output, IC. The terminal count output indicates a maximum count
for one clock pulse and is used to enable the next cascaded
stage to count.
The HCS161MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS161MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
MR 1
CP 2
P0 3
P1 4
P2 5
P3 6
PE 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9 SPEN
MR
CP
P0
P1
P2
P3
PE
GND
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Ordering Information
PART NUMBER
HCS161DMSR
HCS161KMSR
HCS161D/Sample
HCS161K/Sample
HCS161HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
193
Spec Number 518755
File Number 2469.2

1 Page





HCS161D pdf, ピン配列
Specifications HCS161MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
SYMBOL
(NOTE 1)
CONDITIONS
ICC VCC = 5.5V,
VIN = VCC or GND
Output Current
(Sink)
IOL VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
IOH
VOL
VOH
IIN
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
VCC = 4.5V, VIH = 3.15V,
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOH = -50µA, VIL = 1.65V
VCC = 5.5V, VIN = VCC or
GND
Noise Immunity
Functional Test
FN VCC = 4.5V,
VIH = 0.70(VCC),
VIL = 0.30(VCC)
GROUP
A SUB-
GROUPS
1
2, 3
1
2, 3
1
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1
2, 3
7, 8A, 8B
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC
+125oC, -55oC
+25oC, +125oC, -55oC
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
LIMITS
MIN MAX
- 40
- 750
4.8 -
4.0 -
-4.8 -
-4.0 -
- 0.1
- 0.1
VCC
-0.1
VCC
-0.1
-
-
-
-
-
±0.5
±5.0
-
UNITS
µA
µA
mA
mA
mA
mA
V
V
V
V
µA
µA
-
Spec Number 518755
195


3Pages


HCS161D 電子部品, 半導体
Specifications HCS161MS
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
METHOD
TEST
PRE RAD
POST RAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
READ AND RECORD
PRE RAD
POST RAD
1, 9 Table 4 (Note 1)
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1)
11 - 15
1 - 10
-
16 - -
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
11 - 15
8
-
1 - 7, 9, 10, 16
-
-
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
4, 6, 8
11 - 15
1, 3, 5, 7, 9, 10, 16
2
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
11 - 15
8
1 - 7, 9, 10, 16
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518755
198

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部品番号部品説明メーカ
HCS161D

Radiation Hardened Synchronous Counter

Intersil Corporation
Intersil Corporation
HCS161DMSR

Radiation Hardened Synchronous Counter

Intersil Corporation
Intersil Corporation
HCS161HMSR

Radiation Hardened Synchronous Counter

Intersil Corporation
Intersil Corporation
HCS161K

Radiation Hardened Synchronous Counter

Intersil Corporation
Intersil Corporation


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