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HCS125MS の電気的特性と機能

HCS125MSのメーカーはIntersil Corporationです、この部品の機能は「Radiation Hardened Quad Buffer/ Three-State」です。


製品の詳細 ( Datasheet PDF )

部品番号 HCS125MS
部品説明 Radiation Hardened Quad Buffer/ Three-State
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HCS125MS Datasheet, HCS125MS PDF,ピン配置, 機能
HCS125MS
September 1995
Radiation Hardened
Quad Buffer, Three-State
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS125MS is a Radiation Hardened quad three-state
buffer, each having its own output enable input. A high level on the
enable input puts the output in a high impedance state.
The HCS125MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS125MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 VCC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
OE1
A1
Y1
OE2
A2
Y2
GND
1 14
2 13
3 12
4 11
5 10
69
78
VCC
OE4
A4
Y4
OE3
A3
Y3
Ordering Information
Functional Diagram
PART
NUMBER
TEMPERATURE SCREENING
RANGE
LEVEL
PACKAGE
HCS125DMSR -55oC to +125oC Intersil Class 14 Lead SBDIP
S Equivalent
HCS125KMSR -55oC to +125oC Intersil Class 14 Lead Ceramic
S Equivalent Flatpack
HCS125D/
Sample
+25oC
Sample
14 Lead SBDIP
HCS125K/
Sample
+25oC
Sample
14 Lead Ceramic
Flatpack
HCS125HMSR
+25oC
Die
Die
An
OEn
P Yn
n
TRUTH TABLE
INPUTS
OUTPUT
An OEn Yn
HLH
LLL
XHZ
L = Low, H = High, X = Don’t Care, Z = High Impedance
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
123
Spec Number 518831
File Number 3559.1

1 Page





HCS125MS pdf, ピン配列
Specifications HCS125MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Input to Y
Enable Delay
OE toY
Disable Delay
OE toY
SYMBOL
(NOTES 1, 2)
CONDITIONS
TPHL
TPLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
TPZL
TPZH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
TPLZ
TPHZ
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
9
10, 11
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns.
LIMITS
MIN MAX UNITS
2 21 ns
2 25 ns
2 25 ns
2 30 ns
2 25 ns
2 30 ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CONDITIONS
CPD
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
Input Capacitance
CIN VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
Output Capacitance
COUT
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
Output Transition
Time
TTHL
TTLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
NOTES
1
1
1
1
1
1
1
1
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
MIN MAX UNITS
- 60 pF
- 90 pF
- 10 pF
- 10 pF
1 20 pF
1 20 pF
1 15 ns
1 22 ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Output Current
(Source)
Output Current (Sink)
SYMBOL
(NOTE 1)
CONDITIONS
ICC VCC = 5.5V, VIN = VCC or GND
IOH VCC = VIH = 4.5V,
VOUT = VCC -0.4V, VIL = 0
IOL VCC = VIH = 4.5V,
VOUT = 0.4V, VIL = 0
TEMPERATURE
+25oC
+25oC
200K RAD
LIMITS
MIN MAX UNITS
- 0.75 mA
-6.0 - mA
+25oC
6.0 - mA
Spec Number 518831
125


3Pages


HCS125MS 電子部品, 半導体
HCS125MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number 518831
128

6 Page



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部品番号部品説明メーカ
HCS125MS

Radiation Hardened Quad Buffer/ Three-State

Intersil Corporation
Intersil Corporation


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