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HCPL0710 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HCPL0710
部品説明 40 ns Prop. Delay/ SO-8 Optocoupler
メーカ ETC
ロゴ ETC ロゴ 



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HCPL0710 Datasheet, HCPL0710 PDF,ピン配置, 機能
40 ns Prop. Delay,
SO-8 Optocoupler
Preliminary Technical Data
H
HCPL-0710
Features
• +5 V CMOS Compatibility
• 8 ns Pulse Width Distortion
• High Speed: 12 Mbd
• 10 kV/µs Minimum Common
Mode Rejection
• Industrial Temperature
Range: 0°C to 85°C
• Safety and Regulatory
Approvals
UL Recognized 2500 V rms for
1 min. per UL 1577
CSA Component Acceptance
Notice #5
Applications
• Digital Fieldbus Isolation:
DeviceNet, SDS, PROFIBUS
• Multiplexed Data
Transmission
• Computer Peripheral
Interface
• Microprocessor System
Interface
Description
Available in the SO-8 package
style, the HCPL-0710 optocoupler
utilizes the latest CMOS IC
technology to achieve outstanding
performance with very low power
consumption. The HCPL-0710
requires only two bypass
capacitors for complete CMOS
compatibility.
Basic building blocks of the
HCPL-0710 are a CMOS LED
driver IC and a CMOS detector
IC. A CMOS logic input signal
controls the LED driver IC which
supplies current to the LED.
The detector IC incorporates an
integrated photodiode, a high-
speed transimpedance amplifier,
and a voltage comparator with an
output driver.
Functional Diagram
VDD1 1
VI 2
*3
GND1 4
SHIELD
8 VDD2
7
6 VO
5 GND2
TRUTH TABLE
VI, INPUT VI, OUTPUT
HH
LL
*Pin 3 is the anode of the internal LED and must be left unconnected for guaranteed data sheet performance.
Pin 7 is not connected internally. External connections to pin 7 are not recommended.
**A 0.1 µF bypass capacitor must be connected between pins 1 and 4, and 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component
to prevent damage and/or degradation which may be induced by ESD.
This data sheet represents the latest information at the time of publication of this catalog. All specifications
subject to change. Samples available Fall 1996.
1-416

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HCPL0710

40 ns Prop. Delay/ SO-8 Optocoupler

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