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PDF HCPL-6251 Data sheet ( Hoja de datos )

Número de pieza HCPL-6251
Descripción Hermetically Sealed/ Low IF/ Wide VCC/ Logic Gate Optocouplers
Fabricantes Agilent(Hewlett-Packard) 
Logotipo Agilent(Hewlett-Packard) Logotipo



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No Preview Available ! HCPL-6251 Hoja de datos, Descripción, Manual

H
Hermetically Sealed,
Low IF, Wide VCC,
Logic Gate Optocouplers
Technical Data
HCPL-520X*
5962-88768
HCPL-523X
HCPL-623X
HCPL-625X
5962-88769
*See matrix for available extensions.
Features
• Dual Marked with Device
Part Number and DESC
Drawing Number
• Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
• QML-38534, Class H and K
• Four Hermetically Sealed
Package Configurations
• Performance Guaranteed
over -55°C to +125°C
• Wide VCC Range (4.5 to 20 V)
• 350 ns Maximum Propaga-
tion Delay
• CMR: > 10,000 V/µs Typical
• 1500 Vdc Withstand Test
Voltage
• Three State Output Available
• High Radiation Immunity
• HCPL-2200/31 Function
Compatibility
• Reliability Data
• Compatible with LSTTL,
TTL, and CMOS Logic
Applications
• Military and Space
• High Reliability Systems
• Transportation and Life
Critical Systems
• High Speed Line Receiver
• Isolated Bus Driver (Single
Channel)
• Pulse Transformer
Replacement
• Ground Loop Elimination
• Harsh Industrial
Environments
• Computer-Peripheral
Interfaces
Description
These units are single, dual and
quad channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the
appropriate DESC Drawing. All
devices are manufactured and
tested on a MIL-PRF-38534
certified line and are included in
the DESC Qualified Manufac-
turers List QML-38534 for Hybrid
Microcircuits.
Each channel contains an AlGaAs
light emitting diode which is
optically coupled to an integrated
high gain photon detector. The
detector has a threshold with
hysteresis which provides differ-
ential mode noise immunity and
eliminates the potential for
output signal chatter. The
detector in the single channel
units has a tri-state output stage
Truth Tables
(Positive Logic)
Multichannel Devices
Input
Output
On (H)
H
Off (L)
L
Single Channel DIP
Input Enable
On (H)
H
Off (L)
H
On (H)
L
Off (L)
L
Output
Z
Z
H
L
Functional Diagram
Multiple Channel Devices
Available
VCC
VO
VE
GND
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
1-512
5965-3005E

1 page




HCPL-6251 pdf
Absolute Maximum Ratings
Storage Temperature Range, TS .................................. -65°C to +150°C
Operating Temperature, TA ......................................... -55°C to +125°C
Case Temperature, TC ................................................................ +170°C
Junction Temperature, TJ ................................................................................... +175°C
Lead Solder Temperature .............................................. 260°C for 10 s
Average Forward Curre, IF AVG (each channel) ............................. 8 mA
Peak Input Current, IF PK (each channel) ............................... 20 mA[1]
Reverse Input Voltage, VR (each channel) ....................................... 3 V
Supply Voltage ,VCC .............................................. 0.0 V min., 20 V max.
Average Output Current, IO (each channel) ................................. 15 mA
Output Voltage, VO (each channel) .................... –0.3 V min., 20 V max.
Package Power Dissipation, Pd (each channel) ......................... 200 mW
Single Channel Product Only
Tri-State Enable Voltage, VE ............................... –0.3 V min., 20 V max.
8 Pin Ceramic DIP Single Channel Schematic
ANODE
CATHODE
Note enable pin 6. An external 0.01 µF to 0.1 µF bypass capacitor is recommended
between VCC and ground for each package type.
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5200/01, HCPL-6230/31 ........................................... (), Class 1
HCPL-5230/31, HCPL-6250/51 ....................................... (Dot), Class 3
Recommended Operating Conditions
Parameter
Symbol Min.
Power Supply Voltage
Input Current, High Level,
Each Channel
VCC
IFH
4.5
2
Input Voltage, Low Level,
Each Channel
VFL
0
Fan Out (TTL Load)
Each Channel
N
Max.
20
8
0.8
4
Single Channel Product Only
High Level Enable Voltage
Low Level Enable Voltage
VEH
VEL
2.0 20
0 0.8
Units
V
mA
V
V
V
1-516

5 Page





HCPL-6251 arduino
VCC1
(+5 V)
619
DATA
INPUT
4.02 K
TTL OR
LSTTL
OPEN
COLLECTOR
GATE
D.U.T.
VCC
GND
Figure 12. Series LED Drive with Open Collector Gate
(4.02 kResistor Shunts IOH from the LED).
VCC1
(+5 V)
665
DATA
INPUT
TTL OR
LSTTL
DATA TTL OR
TOTEM
INPUT LSTTL
POLE
OUTPUT 1
GATE
TOTEM
POLE
OUTPUT 1
GATE
665
D.U.T.
VCC
GND
0.1
µF
DATA
OUTPUT
UP TO 16 LSTTL
LOADS
OR 4 TTL LOADS
VCC2
(+5 V)
DATA
OUTPUT
UP TO 16 LSTTL
LOADS
OR 4 TTL LOADS
Figure 13. Recommended LSTTL to LSTTL Circuit.
2
IF
+–
VIN
1.90 V
100
D.U.T.*
VCC
IO
VE 1200
VCC + 20 V
0.01 µF
GND
CONDITIONS: IF = 8 mA
IO = -14 mA
TA = +125 °C
*ALL CHANNELS TESTED SIMULTANEOUSLY.
Figure 14. Single Channel Operating Circuit for Burn-in and Steady State Life Tests.
1-522

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