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HCPL-2630 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HCPL-2630
部品説明 HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 



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HCPL-2630 Datasheet, HCPL-2630 PDF,ピン配置, 機能
HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
SINGLE-CHANNEL
6N137
HCPL-2601
HCPL-2611
DUAL-CHANNEL
HCPL-2630
HCPL-2631
DESCRIPTION
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel
optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high
speed integrated photodetector logic gate with a strobable output. This output
features an open collector, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range of -40°C to +85°C. A
maximum input signal of 5 mA will provide a minimum output sink current of 13
mA (fan out of 8).
An internal noise shield provides superior common mode rejection of typically 10
kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs.
The HCPL-2611 has a minimum CMR of 10 kV/µs.
8
FEATURES
• Very high speed-10 MBit/s
• Superior CMR-10 kV/µs
• Double working voltage-480V
• Fan-out of 8 over -40°C to +85°C
• Logic gate output
• Strobable output
• Wired OR-open collector
• U.L. recognized (File # E90700)
N/C 1
+2
V
F
_3
8
V
CC
7
V
E
6V
O
APPLICATIONS
• Ground loop elimination
• LSTTL to TTL, LSTTL or 5-volt CMOS
• Line receiver, data transmission
• Data multiplexing
• Switching power supplies
• Pulse transformer replacement
• Computer-peripheral interface
N/C 4
5 GND
6N137
HCPL-2601
HCPL-2611
TRUTH TABLE
(Positive Logic)
Input
H
L
H
L
H
L
Enable
H
H
L
L
NC
NC
A 0.1 µF bypass capacitor must be connected between pins 8 and 5.
(See note 1)
8
1
8
1
1
+1
V
F1
_2
_3
V
F2
+4
8
V
CC
7
V
01
6V
02
5 GND
HCPL-2630
HCPL-2631
Output
L
H
H
H
L
H
2001 Fairchild Semiconductor Corporation
DS300202 7/9/01
1 OF 11
www.fairchildsemi.com

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