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MT9V024 の電気的特性と機能

MT9V024のメーカーはAptina Imaging Corporationです、この部品の機能は「1/3-Inch Wide-VGA CMOS Digital Image Sensor」です。


製品の詳細 ( Datasheet PDF )

部品番号 MT9V024
部品説明 1/3-Inch Wide-VGA CMOS Digital Image Sensor
メーカ Aptina Imaging Corporation
ロゴ Aptina Imaging Corporation ロゴ 




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MT9V024 Datasheet, MT9V024 PDF,ピン配置, 機能
Aptina Confidential and Proprietary
MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor
Features
1/3-Inch Wide-VGA CMOS Digital Image Sensor
MT9V024 Data Sheet
For the latest data sheet revision, refer to Aptina’s Web site:www.aptina.com
Features
• Array format: Wide-VGA, active 752H x 480V
(360,960 pixels)
• Global shutter photodiode pixels; simultaneous
integration and readout
• RGB Bayer, Monochrome, or RCCC: NIR enhanced
performance for use with non-visible NIR
illumination
• Readout modes: progressive or interlaced
• Shutter efficiency: >99%
• Simple two-wire serial interface
• Real-time exposure context switching - dual register
set
• Register lock capability
• Window size: User programmable to any smaller
format (QVGA, CIF, QCIF). Data rate can be
maintained independent of window size
• Binning: 2 x 2 and 4 x 4 of the full resolution
• ADC: On-chip, 10-bit column-parallel (option to
operate in 12-bit to 10-bit companding mode)
• Automatic controls: Auto exposure control (AEC)
and auto gain control (AGC); variable regional and
variable weight AEC/AGC
• Support for four unique serial control register IDs to
control multiple imagers on the same bus
• Data output formats:
Single sensor mode:
10-bit parallel/stand-alone
8-bit or 10-bit serial LVDS
Stereo sensor mode:
Interspersed 8-bit serial LVDS
• High dynamic range (HDR) mode
Applications
• Automotive
• Unattended surveillance
• Stereo vision
• Smart vision
• Automation
• Video as input
• Machine vision
Table 1:
Key Performance Parameters
Parameter
Optical format
Active imager size
Active pixels
Pixel size
Color filter array
Shutter type
Maximum data rate
master clock
Full resolution
Frame rate
ADC resolution
Responsivity
Dynamic range
Supply voltage
Power consumption
Operating temperature
Packaging
Value
1/3-inch
4.51mm(H) x 2.88mm(V)
5.35mm diagonal
752H x 480V
6.0μm x 6.0μm
Monochrome, color RGB Bayer or
RCCC pattern
Global shutter
27 Mp/s
27 MHz
752 x 480
60 fps (at full resolution)
10-bit column-parallel
4.8 V/lux-sec (550nm)
>55dB linear;
>100dB in HDR mode
3.3V +0.3V (all supplies)
<160mW at maximum data rate
(LVDS disabled); 120μW standby
power at 3.3V
-40°C to +105°C ambient
52-ball iBGA, automotive-qualified;
wafer or die
Ordering Information
Table 2:
Available Part Numbers
Part Number
MT9V024IA7XTC
MT9V024IA7XTM
MT9V024IA7XTR
MT9V024IA7XTCD
MT9V024IA7XTCH
MT9V024IA7XTMD
MT9V024IA7XTMH
MT9V024IA7XTRD
MT9V024IA7XTRH
Description
iBGA RoHS-compliant RGB Bayer
sensor
iBGA RoHS-compliant
monochrome
iBGA RoHS-compliant RCCC sensor
RGB Bayer Demo Kit (Pb-free)
RGB Bayer Headboard (Pb-free)
Monochrome Demo Kit (Pb-free)
Monochrome Headboard (Pb-free)
RCCC Demo Kit (Pb-free)
RCCC Headboard (Pb-free)
PDF: 4367504165/Source: 0024259821
MT9V024_DS - Rev. E Pub. 12/12 EN
1.
©2008 Aptina Imaging Corporation All rights reserved.

1 Page





MT9V024 pdf, ピン配列
Aptina Confidential and Proprietary
MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor
Table of Contents
Row Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Changes to Integration Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Exposure Indicator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
High Dynamic Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
ADC Companding Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Gain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Changes to Gain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Analog Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Digital Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Defective Pixel Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Row-wise Noise Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Automatic Gain Control and Automatic Exposure Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Pixel Clock Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Hard Reset of Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Soft Reset of Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
STANDBY Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Monitor Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Read Mode Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Column Flip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Row Flip. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Pixel Binning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Row Binning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Column Binning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Interlaced Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
LINE_VALID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
LVDS Serial (Stand-Alone/Stereo) Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
LVDS Output Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
LVDS Enable and Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
LVDS Data Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Propagation Delays for PIXCLK and Data Out Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
Propagation Delays for FRAME_VALID and LINE_VALID Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
Two-Wire Serial Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53
Minimum Master Clock Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58
Appendix A: Power-On Reset and Standby Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
Appendix B: Electrical Identification of CFA Type. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
PDF: 4367504165/Source: 0024259821
MT9V024_DS - Rev. E Pub. 12/12 EN
3.
©2008 Aptina Imaging Corporation. All rights reserved.


3Pages


MT9V024 電子部品, 半導体
Aptina Confidential and Proprietary
MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor
General Description
General Description
The MT9V024 is a 1/3-inch wide-VGA format CMOS active-pixel digital image sensor
with global shutter and high dynamic range (HDR) operation. The sensor has specifi-
cally been designed to support the demanding interior and exterior automotive imaging
needs, which makes this part ideal for a wide variety of imaging applications in real-
world environments.
This wide-VGA CMOS image sensor features Aptina’s breakthrough low-noise CMOS
imaging technology that achieves CCD image quality (based on signal-to-noise ratio and
low-light sensitivity) while maintaining the inherent size, cost, and integration advan-
tages of CMOS.
The active imaging pixel array is 752H x 480V. It incorporates sophisticated camera func-
tions on-chip—such as binning 2 x 2 and 4 x 4, to improve sensitivity when operating in
smaller resolutions—as well as windowing, column and row mirroring. It is program-
mable through a simple two-wire serial interface.
The MT9V024 can be operated in its default mode or be programmed for frame size,
exposure, gain setting, and other parameters. The default mode outputs a
wide-VGA-size image at 60 frames per second (fps).
An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. A 12-bit resolu-
tion companded for 10 bits for small signals can be alternatively enabled, allowing more
accurate digitization for darker areas in the image.
In addition to a traditional, parallel logic output the MT9V024 also features a serial low-
voltage differential signaling (LVDS) output. The sensor can be operated in a stereo-
camera, and the sensor, designated as a stereo-master, is able to merge the data from
itself and the stereo-slave sensor into one serial LVDS stream.
The sensor is designed to operate in a wide temperature range (–40°C to +105°C).
Figure 1: Block Diagram
Active-Pixel
Sensor (APS)
Array
752H x 480V
Control Register
Timing and Control
Serial
Register
I/O
Analog Processing
ADCs
Digital Processing
Serial Video
Slave Video LVDS In
LVDS Out
(for stereo applications only)
Parallel
Video
Data Out
PDF: 4367504165/Source: 0024259821
MT9V024_DS - Rev. E Pub. 12/12 EN
6.
©2008 Aptina Imaging Corporation. All rights reserved.

6 Page



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共有リンク

Link :


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