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PDF ICM7217CIPl Data sheet ( Hoja de datos )

Número de pieza ICM7217CIPl
Descripción 4-Digit LED Display / Programmable Up/Down Counter
Fabricantes Intersil 
Logotipo Intersil Logotipo



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No Preview Available ! ICM7217CIPl Hoja de datos, Descripción, Manual

July 2001
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ICM7217
4-Digit LED Display,
Programmable Up/Down Counter
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Features
Description
• Four Decade, Presettable Up-Down Counter with
Parallel Zero Detect
• Settable Register with Contents Continuously
Compared to Counter
• Directly Drives Multiplexed 7 Segment Common
Anode or Common Cathode LED Displays
• On-Board Multiplex Scan Oscillator
• Schmitt Trigger On Count Input
• TTL Compatible BCD I/O Port, Carry/Borrow, Equal,
and Zero Outputs
• Display Blank Control for Lower Power Operation;
Quiescent Power Dissipation <5mW
• All Terminals Fully Protected Against Static Discharge
• Single 5V Supply Operation
Jameco Part Number 43801
The ICM7217 is a four digit, presettable up/down counter with
an onboard presettable register continuously compared to the
counter. The ICM7217 is intended for use in hard-wired
applications where thumbwheel switches are used for loading
data, and simple SPDT switches are used for chip control.
This circuit provides multiplexed 7 segment LED display
outputs, with common anode or common cathode
configurations available. Digit and segment drivers are
provided to directly drive displays of up to 0.8 inch
character height (common anode) at a 25% duty cycle. The
frequency of the onboard multiplex oscillator may be
controlled with a single capacitor, or the oscillator may be
allowed to free run. Leading zeros can be blanked. The
data appearing at the 7 segment and BCD outputs is
latched; the content of the counter is transferred into the
latches under external control by means of the Store pin.
The ICM7217 (common anode) and ICM7217A (common
cathode) versions are decade counters, providing a
maximum count of 9999, while the ICM7217B (common
anode) and ICM7217C (common cathode) are intended for
timing purposes, providing a maximum count of 5959.
This circuit provides 3 main outputs; a CARRY/BORROW
output, which allows for direct cascading of counters, a
ZERO output, which indicates when the count is zero, and
an EQUAL output, which indicates when the count is equal
to the value contained in the register. Data is multiplexed to
and from the device by means of a three-state BCD I/O port.
The CARRY/BORROW, EQUAL, ZERO outputs, and the
BCD port will each drive one standard TTL load.
To permit operation in noisy environments and to prevent
multiple triggering with slowly changing inputs, the count
input is provided with a Schmitt trigger.
Input frequency is guaranteed to 2MHz, although the device will
typically run with fIN as high as 5MHz. Counting and comparing
(EQUAL output) will typically run 750kHz maximum.
Part Number Information
PART
NUMBER
ICM7217AIPI
ICM7217CIPl
TEMP. RANGE
(oC)
-25 to 85
-25 to 85
ICM7217IJI
lCM7217BlJl
-25 to 85
-25 to 85
PACKAGE
28 Ld PDIP
28 Ld PDIP
28 Ld CERDIP
28 Ld CERDIP
DISPLAY DRIVER
TYPE
Common Cathode
Common Cathode
Common Anode
Common Anode
COUNT OPTION/
MAX COUNT
Decade/9999
Timing/5959
Decade/9999
Timing/5959
PKG. NO.
E28.6
E28.6
F28.6
F28.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
1
File Number 3167.3

1 page




ICM7217CIPl pdf
Timing Waveforms
SCAN
INTERNAL OSC
OUTPUT
D4
INTERNAL
(BCD AND
SEGMENT
ENABLE)
D3
D2
D1
10µs TYP
FREE-RUNNING
INTERNAL
(COMMON
ANODE
DIGIT
STROBES)
D4
D3
D2
D1
ICM7217
400µs TYP
FREE-RUNNING
INTERDIGIT BLANK
UP/DOWN
COUNT INPUT
CARRY/BORROW
EQUAL
ZERO
FIGURE 1. MULTIPLEX TIMING
tUCS
tUCH
tCWH
tCB
tCEL
tCZL
tBW
tCWL
tCEH
tCZH
FIGURE 2. COUNT AND OUTPUTS TIMING
5

5 Page





ICM7217CIPl arduino
ICM7217
VDD = 5V
35
LCD DISPLAY
37 - 40
2 - 26
28 SEGMENTS
AND BACKPLANE
D4
D3
D2
ICM7211
D1
DB3
DB2
DB1
DB0
34
33
32
31
30
29
28
27
VDD = 5V
4 8s
5 4s
6 2s
7 1s
24
VDD
23
DC
20
COUNT
STORE
UP/DN
RESET
8
9
10
14
D1 28
D2
ICM7217
IJI D3
D4
27
26
25
24
18
C
24
18
C
24
18
C
24
18
C
10k- 20k
FIGURE 14. LCD DISPLAY INTERFACE (WITH THUMBWHEEL SWITCHES)
The lCM7217A and the ICM7217C are used to drive com-
mon cathode displays, and the BCD inputs are low true.
BCD outputs are high true.
Notes on Thumbwheel Switches and Multiplexing
As it was mentioned, the ICM7217 is basically designed to
be used with thumbwheel switches for loading the data to
the device. See Figure 14 and Figure 17.
The thumbwheel switches used with these circuits (both
common anode and common cathode) are TRUE BCD
coded; i.e. all switches open corresponds to 0000. Since the
thumbwheel switches are connected in parallel, diodes must
be provided to prevent crosstalk between digits. In order to
maintain reasonable noise margins, these diodes should be
specified with low forward voltage drops (IN914). Similarly, if
the BCD outputs are to be used, resistors should be inserted
in the Digit lines to avoid loading problems.
Output and Input Restrictions
LOAD COUNTER and LOAD REGISTER operations take
1.6ms typical (5ms maximum) after LC or LR are released.
During this load period the EQUAL and ZERO outputs are
not valid (see Figure 3). Since the Counter and register are
compared by XOR gates, loading the counter or register can
cause erroneous glitches on the EQUAL and ZERO outputs
when codes cross.
LOAD COUNTER or LOAD REGISTER, and RESET input
can not be activated at the same time or within a short
period of each other. Operation of each input must be
delayed 1.6ms typical (5ms for guaranteed proper operation)
relating to the preceding one.
Counter and register can be loaded together with the same
value if LC and LR inputs become activated exactly at the
same time.
Notice the setup and hold time of UP/DOWN input when it is
changing during counting operation. Violation of UP/ DOWN
hold time will result in incrementing or decrementing the
counter by 1000, 100 or 10 where the preceding digit is
transitioning from 5 to 6 or 6 to 5.
The RESET input may be susceptible to noise if its input rise
time is greater than about 500µs This will present no prob-
lems when this input is driven by active devices (i.e., TTL or
CMOS logic) but in hardwired systems adding virtually any
capacitance to the RESET input can cause trouble. A simple
circuit which provides a reliable power-up reset and a fast
rise time on the RESET input is shown on Figure 15.
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