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PDF LT4363CS-2 Data sheet ( Hoja de datos )
| Número de pieza | LT4363CS-2 | |
| Descripción | High Voltage Surge Stopper | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LT4363
High Voltage Surge
Stopper with Current Limit
FEATURES
n Withstands Surges Over 80V with VCC Clamp
n Wide Operating Voltage Range: 4V to 80V
n Adjustable Output Clamp Voltage
n Fast Overcurrent Limit: Less Than 5µs
n Reverse Input Protection to –60V
n Adjustable UV/OV Comparator Thresholds
n Low 7µA Shutdown Current
n Shutdown Pin Withstands –60V to 100V
n Adjustable Fault Timer
n Controls N-Channel MOSFET
n Less Than 1% Retry Duty Cycle During Faults,
LT4363-2
n Available in 12-Pin (4mm × 3mm) DFN, 12-Pin
MSOP or 16-Pin SO Packages
APPLICATIONS
n Automotive/Avionic Surge Protection
n Hot Swap™/Live Insertion
n High Side Switch for Battery Powered Systems
n Intrinsic Safety Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No RSENSE, ThinSOT and Hot Swap are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
DESCRIPTION
The LT®4363 surge stopper protects loads from high voltage
transients. It regulates the output during an overvoltage
event, such as load dump in vehicles, by controlling the
gate of an external N-channel MOSFET. The output is limited
to a safe value allowing the loads to continue functioning.
The LT4363 also monitors the voltage drop between the
SNS and OUT pins to protect against overcurrent faults.
An internal amplifier limits the voltage across the current
sense resistor to 50mV. In either fault condition, a timer is
started inversely proportional to MOSFET stress. Before the
timer expires, the FLT pin pulls low to warn of an impend-
ing power down. If the condition persists, the MOSFET is
turned off. The LT4363-1 remains off until reset whereas
the LT4363-2 restarts after a cool down period.
Two precision comparators can monitor the input supply
for overvoltage (OV) and undervoltage (UV) conditions.
When the potential is below the UV threshold, the external
MOSFET is kept off. If the input supply voltage is above the
OV threshold, the MOSFET is not allowed to turn back on.
Back-to-back MOSFETs can be used in lieu of a Schottky
diode for reverse input protection, reducing voltage drop
and power loss. A shutdown pin reduces the quiescent
current to less than 7µA during shutdown.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator with 150V Surge Protection
VIN
12V
0.1µF
SMAJ58A
127k
49.9k
FDB33N25 10mΩ
1k
10Ω
VCC GATE SNS
SHDN
UV
LT4363-2
OUT
FB
ENOUT
OV GND TMR FLT
4363 TA01
0.1µF
57.6k
22µF
OUTPUT
CLAMP
AT 16V
4.99k
FAULT
VCC
DC/DC
CONVERTER
SHDN GND
VIN
20V/DIV
Overvoltage Protector Regulates
Output at 27V During Transient
80V INPUT SURGE
CTMR = 6.8µF
ILOAD = 500mA
12V
VOUT
20V/DIV
12V
27V ADJUSTABLE CLAMP
100ms/DIV
4363 TA01b
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1
1 page  
LT4363
TYPICAL PERFORMANCE CHARACTERISTICS
otherwise noted.
Specifications are at VCC = 12V, TA = 25°C, unless
Supply Current During Shutdown
Supply Current During Shutdown
Supply Current vs Supply Voltage
vs Temperature
vs Supply Voltage
(ICC vs VCC)
(ICC(SHDN) vs Temperature)
(ICC(SHDN) vs VCC)
1000
8 OUT = SNS = 0V
6 OUT = SNS = 0V
800 7 5
6
600 5 4
43
400 3 2
2
200 1 1
0
0 10 20 30 40 50 60 70 80
VCC (V)
4363 G01
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
4363 G02
0
0 10 20 30 40 50 60 70 80
VCC (V)
4363 G03
SHDN Current vs Temperature
3.0
2.5 SHDN = 0V
2.0
SHDN = 0.4V
1.5
1.0
0.5
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
4363 G04
GATE Pull-Up Current vs VCC
40 VCC = SNS = OUT = GATE
35
30
25
20
15
10
5
0
0 10 20 30 40 50 60 70 80
VCC (V)
4363 G05
GATE Pull-Up Current vs
Temperature
40 VCC = SNS = OUT
35
30
25
20
15
10
5
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
4363 G06
GATE Pull-Down Current vs
Temperature: Overcurrent
200
175
150
125
100
75
50
25
∆VSNS = 150mV
OUT = 0V
0 GATE = 10V
–50 –25 0
25 50 75
TEMPERATURE (°C)
100 125
4363 G07
GATE Pull-Down Current vs
Temperature: Overvoltage
200
175
150
125
100
75
50
25
SNS = OUT = 5V
GATE = 12V
0 FB = 1.5V
–50 –25 0
25 50 75
TEMPERATURE (°C)
100 125
4363 G08
Gate Drive Voltage vs Gate
Pull-Down Current ΔVGATE vs IGATE
16 VCC = SNS = OUT
14
12
10
8
6
4
2
0
0 2 4 6 8 10
IGATE (µA)
4363 G09
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5 Page 
LT4363
APPLICATIONS INFORMATION
The LT4363 limits the voltage and current delivered to the
load during supply transient or output overload events. The
total fault timer period is set to ride through short-duration
faults, while longer events cause the output to shut off
and protect the MOSFET pass device from damage. The
MOSFET provides a low resistance path from the input to
the load during normal operation, while in fault conditions
it operates as a series regulator.
Overvoltage Fault
The LT4363 limits the voltage at the output during an
overvoltage at the input. An internal amplifier regulates
the GATE pin to maintain 1.275V at the FB pin. During
this interval the MOSFET is on and supplies current to
the load. This allows uninterrupted operation during short
overvoltage events. If the overvoltage condition persists,
the timer causes the MOSFET to turn off.
Overcurrent Fault
The LT4363 features and adjustable current limit that pro-
tects against output short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the SNS and OUT
pins to 50mV. In the case of a severe short at the output,
where OUT is less than 2V, the current sense voltage is
reduced to 25mV to further reduce power dissipation in
the MOSFET. If the overcurrent condition persists, the
timer causes the MOSFET to turn off.
Fault Timer Overview
Overvoltage and overcurrent conditions are limited in
duration by an adjustable timer. A capacitor at the TMR pin
sets the delay time before a fault condition is reported at
the FLT pin as well as the overall delay before the MOSFET
is turned off. The same capacitor also sets the cool down
time before the MOSFET is allowed to turn back on.
When either an overvoltage or overcurrent fault condition
occurs, a current source charges the TMR pin capacitor.
The exact current level varies as a function of the type of
fault and the VDS voltage drop across the MOSFET. This
scheme takes better advantage of the MOSFET’s available
Safe Operating Area (SOA) than would a fixed timer current.
The TMR pin is biased to 0.5V under normal operating
conditions. In the presence of a fault the timer first charges
to 1.275V, and then enters the early warning phase of
operation. At this point the FLT pin pulls low and after
charging to 1.375V, the timer shuts off the MOSFET. The
warning phase is indicated by FLT low and gives time for
the load to perform house-keeping chores such as data
storage in anticipation of impending power loss. After
faulting off, the timer enters the cool down phase. At the
end of the cool down period the LT4363-1 remains off until
reset, while the LT4363-2 automatically restarts. For the
LT4363-2 retry is inhibited if the OV pin is greater than
1.275V. This prevents motorboating in the event there is
a sustained input overvoltage condition.
Fault Timer Operation in Overvoltage
In the presence of an overvoltage condition when the
LT4363 regulates the output voltage, the timer charges
from 0.5V to 1.275V with a current that varies as a func-
tion of VDS (see Figure 1). VDS is inferred from the drop
across VCC and OUT. The timer current increases linearly
from around 4µA with VDS ≤ 0.5V, to 50µA with VDS = 75V.
Because VDS is measured indirectly, clamping or filtering
at the VCC pin affects the timer current response. A graph
of Overvoltage TMR Current vs (VCC – VOUT) is shown in
the Typical Performance Characteristics.
When TMR reaches 1.275V, the FLT pin is latched low as
an early warning of impending shutdown. The timer cur-
rent is cut to a fixed value of 6µA and continues to run
until TMR reaches 1.375V, producing a fixed early warning
period given by:
CTMR
=
t WARNING
•
6µA
100mV
When TMR reaches 1.375V, the MOSFET is turned off and
allowed to cool for an extended period. The total elapsed
time between the onset of output regulation and turn-off
is given by:
tREG
=
CTMR
•
0.775V
ITMR
+
100mV
6µA
Because ITMR is a function of VCC – VOUT, the exact time in
regulation depends upon the input waveform and the time
required for the output voltage to come into regulation.
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11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LT4363CS-2.PDF ] | |
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