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P5NC50FPのメーカーはST Microelectronicsです、この部品の機能は「STP5NC50FP」です。 |
部品番号 | P5NC50FP |
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部品説明 | STP5NC50FP | ||
メーカ | ST Microelectronics | ||
ロゴ | |||
このページの下部にプレビューとP5NC50FPダウンロード(pdfファイル)リンクがあります。 Total 12 pages
STP5NC50 - STP5NC50FP
STB5NC50 - STB5NC50-1
N-CHANNEL 500V - 1.3Ω - 5.5A TO-220/FP/D2PAK/I2PAK
PowerMesh™ II MOSFET
TYPE
VDSS
RDS(on)
ID
STP5NC50
STP5NC50FP
STB5NC50
STB5NC50-1
500 V
500 V
500 V
500 V
< 1.5Ω
< 1.5Ω
< 1.5Ω
< 1.5Ω
5.5A
5.5A
5.5A
5.5A
s TYPICAL RDS(on) = 1.3Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s NEW HIGH VOLTAGE BENCHMARK
s GATE CHARGE MINIMIZED
DESCRIPTION
The PowerMESH™ II is the evolution of the first
generation of MESH OVERLAY™ . The layout re-
finements introduced greatly improve the Ron*area
figure of merit while keeping the device at the lead-
ing edge for what concerns swithing speed, gate
charge and ruggedness.
TO-220
3
1
D2PAK
TO-220FP
123
I2PAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVES
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS Gate- source Voltage
ID Drain Current (continuos) at TC = 25°C
ID Drain Current (continuos) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tj Operating Junction Temperature
Tstg Storage Temperature
(•)Pulse width limited by safe operating area
(1)ISD ≤5.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
December 2002
Value
STP5NC50
STB5NC50/-1
STP5NC50FP
500
500
±30
5.5 5.5(*)
3.5 3.5(*)
22 22
100 35
0.8 0.28
3.5
- 2500
-55 to 175
-65 to 175
(*)Limited only by maximum temperature allowed
Unit
V
V
V
A
A
A
W
W/°C
V/ns
V
°C
°C
1/12
1 Page STP5NC50 - STP5NC50FP - STB5NC50 - STB5NC50-1
ELECTRICAL CHARACTERISTICS
(CONTINUED)
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Delay Time
Rise Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
SWITCHING OFF
Symbol
Parameter
tr(Voff)
Off-voltage Rise Time
tf Fall Time
tc Cross-over Time
Test Condition s
VDD = 250V, ID = 2.5A
RG = 4.7Ω VGS = 10V
(see test circuit, Figure 3)
VDD = 400V, ID = 5.5A,
VGS = 10V
Test Condit ions
VDD = 400V, ID = 5.5A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
Min.
Typ.
14
15
17.5
3
9
Max.
24.5
Unit
ns
ns
nC
nC
nC
Min .
Typ.
12
14
20
Max.
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Condition s
ISD Source-drain Current
ISDM (2) Source-drain Current (pulsed)
VSD (1) Forward On Voltage
ISD = 5.5A, VGS = 0
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 5.5A, di/dt = 100A/µs,
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Min.
Typ.
360
1.6
9
Max.
5.5
22
1.6
Unit
A
A
V
ns
µC
A
Safe Operating Area for TO-220/D2PAK/I2PAK Safe Operating Area for TO-220FP
3/12
3Pages STP5NC50 - STP5NC50FP - STB5NC50 - STB5NC50-1
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/12
6 Page | |||
ページ | 合計 : 12 ページ | ||
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PDF ダウンロード | [ P5NC50FP データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
P5NC50FP | STP5NC50FP | ST Microelectronics |