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PDF MC14511 Data sheet ( Hoja de datos )

Número de pieza MC14511
Descripción BCD-TO-SEVEN SEGMENT LATCH/DECODER/DRIVER
Fabricantes Unisonic Technologies 
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UTC MC14511
BCD-TO-SEVEN SEGMENT
LATCH/DECODER/DRIVER
DESCRIPTION
The UTC MC14511 BCD–to–seven segment
latch/decoder/driver is constructed with complementary
MOS (CMOS) enhancement mode devices and NPN
bipolar output drivers in a single monolithic structure. The
circuit provides the functions of a 4-bit storage latch, an
8421 BCD-to-seven segment decoder, and an output
drive capability. Lamp test (LT), blanking (BI), and latch
enable (LE) inputs are used to test the display, to turn-off
or pulse modulate the brightness of the display, and to
store a BCD code, respectively. It can be used with
seven-segment light-emitting diodes (LED),
incandescent, fluorescent, gas discharge, or liquid crystal
readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM,
etc.) display driver, computer/calculator display driver,
cockpit display driver, and various clock, watch, and
timer uses.
FEATURES
* Low Logic Circuit Power Dissipation
* High–Current Sourcing Outputs (Up to 25 mA)
* Latch Storage of Code
* Blanking Input
* Lamp Test Provision
* Readout Blanking on all Illegal Input Combinations
* Lamp Intensity Modulation Capability
* Time Share (Multiplexing) Facility
* Supply Voltage Range = 3.0 V ~ 18 V
* Capable of Driving Two Low-power TTL Loads, One
Low-power Schottky TTL Load or Two HTL Loads Over
the Rated Temperature Range
* Chip Complexity: 216 FETs or 54 Equivalent Gates
* Triple Diode Protection on all Inputs
CMOS IC
SOP-16
DIP-16
UTC UNISONIC TECHNOLOGIES CO., LTD. 1
QW-R502-021,B

1 page




MC14511 pdf
UTC MC14511
CMOS IC
PARAMETER
SYMBOL
VDD
Vdc
TEST CONDITIONS
MIN
TYP MAX
Output Drive Voltage
VOH
15 IOH=0mA
IOH=5.0mA
IOH=10mA
IOH=15mA
IOH=20mA
IOH=25mA
Source
14.1
14
13.6
14.59
14.27
14.18
14.07
13.95
13.70
Output Drive Current
IOL
5.0 VOL=0.4V
10 VOL=0.5V
15 VOL=1.5V
Sink 0.51
1.3
3.4
0.88
2.25
8.8
Input Current
Iin 15
±0.00001 ±0.1
Input Capacitance
Cin
5.0 7.5
Quiescent Current
5.0 (Per Package) Vin=0 or
0.005
5.0
IDD 10 VDD,
15 Iout=0μA
0.010
0.015
10
20
Total Supply Current
(Notes 5 & 6)
IT
5.0 (Dynamic plus Quiescent,
10 Per Package)
15 (CL=50pF on all outputs, all
buffers switching)
IT=(1.9μA/kHz) f+IDD
IT=(3.8μA/kHz) f+IDD
IT=(5.7μA/kHz) f+IDD
Note 4: Noise immunity specified for worst–case input combination.
Noise Margin for both “1” and “0” level =
1.0 V min @ VDD = 5.0 V
2.0 V min @ VDD = 10 V
2.5 V min @ VDD = 15 V
Note 5: The formulas given are for the typical characteristics only at 25.
Note 6: To calculate total supply current at loads other than 50 pF:
IT (CL) = IT(50 pF) + 3.5 x 10–3 (CL – 50) VDDf
Where: IT is inμA (per package), CL in pF, VDD in Vdc, and f in kHz is input frequency.
UNIT
V
mA
μA
pF
μA
μA
UTC UNISONIC TECHNOLOGIES CO., LTD. 5
QW-R502-021,B

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