PDF HDSP-5301 Data sheet ( Hoja de datos )

Número de pieza	HDSP-5301
Descripción	14.2 mm (0.56 inch) Seven Segment Displays
Fabricantes	Agilent(Hewlett-Packard)
Logotipo
Hay una vista previa y un enlace de descarga de HDSP-5301 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas
No Preview Available ! Gigabit Ethernet Transceiver Chip Preliminary Technical Data HDMP-1636 Transceiver HDMP-1646 Transceiver Features • IEEE 802.3z Gbit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification” • Low Power Consumption • Transmitter and Receiver Functions Incorporated onto a Single IC • Two Package Sizes Available: – 10 mm PQFP (HDMP-1636) – 14 mm PQFP (HDMP-1646) • 10-Bit Wide Parallel TTL Compatible I/Os • Single +3.3 V Power Supply • 5-Volt Tolerant I/Os • 2 KV ESD Protection Applications • 1250 MBd Gigabit Ethernet Interface • High Speed Proprietary Interface • Backplane Serialization • Bus Extender Description The HDMP-1636/46 transceiver is a single silicon bipolar integrated circuit packaged in a plastic QFP package. It provides a low-cost, low-power physical layer solution for 1250 MBd Gigabit Ethernet or proprietary link interfaces. It provides complete Serialize/ Deserialize for copper transmis- sion, incorporating both the Gigabit Ethernet transmit and receive functions into a single device. This chip is used to build a high speed interface (as shown in Figure 1) while minimizing board space, power and cost. It is compatible with the IEEE 802.3z specification. The transmitter section accepts 10-bit wide parallel TTL data and multiplexes this data into a high speed serial data stream. The parallel data is expected to be 8B/10B encoded data, or equiv- alent. This parallel data is latched into the input register of the transmitter section on the rising edge of the 125 MHz reference clock (used as the transmit byte clock). The transmitter section’s PLL locks to this user supplied 125 MHz byte clock. This clock is then multiplied by 10, to gener- ate the 1250 MHz serial signal clock used to generate the high speed output. The high speed outputs are capable of interfacing directly to copper cables for electrical transmission or to a separate fiber optic module for optical transmission. The receiver section accepts a serial electrical data stream at 1250 MBd and recovers the original 10-bit wide parallel data. The receiver PLL locks onto the incoming serial signal and recovers the high speed serial clock and data. The serial data is converted back into 10-bit parallel data, recognizing the 8B/10B comma character to establish byte alignment. The recovered parallel data is presented to the user at TTL compatible outputs. The receiver section also recovers two 62.5 MHz receiver byte clocks which are 180 degrees out of phase with each other. The parallel data is properly aligned with the rising edge of alternating clocks. For test purposes, the transceiver provides for on-chip local loop- back functionality, controlled through an external input pin. Additionally, the byte (5/97) 711 1 page REFCLK ,,,,,,,TX[0]-TX[9] DATA DATA DATA DATA DATA 1.4 V 2.0 V 0.8 V tSETUP tHOLD Figure 3. Transmitter Section Timing. DATA BYTE A DATA BYTE B ± DOUT T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 t_TXLAT ,, ,,TX[0]-TX[9] DATA BYTE B DATA BYTE C REFCLK 1.4 V Figure 4. Transmitter Latency. 715 5 Page GND_TXTTL TX[0] TX[1] TX[2] VCC_TXTTL TX[3] TX[4] TX[5] TX[6] VCC_TXTTL TX[7] TX[8] TX[9] GND_TXTTL GND_TXA TXCAP1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 HDMP-16x6 41 9 xxxx-x Rz.zz 40 10 39 11 S YYWW 38 12 37 13 36 14 35 15 34 16 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 RXCAP0 BYTSYNC GND_RXTTL RX[0] RX[1] RX[2] VCC_RXTTL RX[3] RX[4] RX[5] RX[6] VCC_RXTTL RX[7] RX[8] RX[9] GND_RXTTL xxxx-x = WAFER LOT NUMBER–BUILD NUMBER Rzz.zz = DIE REVISION S = SUPPLIER CODE YYWW = DATE CODE (YY = YEAR, WW = WORK WEEK) COUNTRY = COUNTRY OF MANUFACTURE (MARKED ON BACK OF DEVICE) Figure 11. HDMP-1636/46 (TRx) Package Layout and Marking, Top View. *Note: Pins 26 and 27 are designated as “no connect” pins and must be left unconnected. 721 11 Page

Páginas	Total 15 Páginas
PDF Descargar	[ Datasheet HDSP-5301.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
HDSP-5300	14.2 mm (0.56 inch) Seven Segment Displays	ETC
HDSP-5301	14.2 mm (0.56 inch) Seven Segment Displays	Agilent(Hewlett-Packard)
HDSP-5301	14.2 mm (0.56 inch) Seven Segment Displays	ETC
HDSP-5303	14.2 mm (0.56 inch) Seven Segment Displays	Agilent(Hewlett-Packard)

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar