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PDF HD74LVC16241 Data sheet ( Hoja de datos )

Número de pieza HD74LVC16241
Descripción 16-bit Buffers / Line Drivers with 3-state Outputs
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HD74LVC16241
16-bit Buffers / Line Drivers with 3-state Outputs
ADE-205-073B(Z)
3rd Edition
November 1995
Description
The HD74LVC16241 has sixteen buffer drivers with three state outputs in a 48 pin package. This device is
a non inverting buffer and has two active low enables (1G, 4G), high enables (2G, 3G). Each enable
independently controls four buffers. Low voltage and high speed operation is suitable at the battery drive
product (note type personal computer) and low power consumption extends the life of a battery for long
time operation.
Features
VCC = 2.0 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
Function Table
GG
HL
LH
LH
H: High level
L: Low level
X: Immaterial
Z: High impedance
Inputs
A
X
H
L
Output Y
Z
H
L

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HD74LVC16241 pdf
HD74LVC16241
Switching Characteristics
Item
Propagation delay time
Output enable time
Output disable time
Input capacitance
Output capacitance
Symbol VCC (V)
tPLH 2.7
tPHL 3.3±0.3
5.0±0.5
tZH 2.7
tZL 3.3±0.3
5.0±0.5
tHZ 2.7
tLZ 3.3±0.3
5.0±0.5
CIN 2.7
CO 2.7
Ta = –40 to 85°C
Min Typ Max
— 4.5 7.5
1.5 3.5 6.5
— 2.5 5.0
— 5.0 9.0
1.5 4.0 8.0
— 3.0 7.0
— 4.5 8.5
1.5 4.0 7.5
— 2.5 7.0
— 3.0 —
— 15.0 —
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
From (Input) To (Output)
AY
G, G
Y
G, G
Y
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout = 50
1G, 2G, 3G, 4G
1Y1 to 4Y4
1A1 to 4A4
Output
CL =
50 pF
500 S1
450
50 Scope
OPEN
*1 See under table
GND
Note:
1. CL includes probe and jig capacitance.
Symbol
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
OPEN OPEN
GND
GND
6 V 2×Vcc
5

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