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HD74LVC125AのメーカーはHitachi Semiconductorです、この部品の機能は「Quad. Bus Buffer Gates with 3-state Outputs」です。 |
部品番号 | HD74LVC125A |
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部品説明 | Quad. Bus Buffer Gates with 3-state Outputs | ||
メーカ | Hitachi Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとHD74LVC125Aダウンロード(pdfファイル)リンクがあります。 Total 9 pages
HD74LVC125A
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-108B(Z)
3rd Edition
December 1996
Description
The HD74LVC125A has four bus buffer gates in a 14 pin package. The device require the three state
control input C to be taken high to put the output into the high impedance condition, whereas the device
requires the control input to be low to put the output into high impedance. Low voltage and high speed
operation is suitable at the battery drive product (note type personal computer) and low power consumption
extends the life of a battery for long time operation.
Features
• VCC = 2.0 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
Function Table
Inputs
CA
HX
LL
LH
H : High level
L : Low level
X : Immaterial
Z : High impedance
Outputs Y
Z
L
H
1 Page HD74LVC125A
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Supply voltage
VCC 1.5 to 5.5
2.0 to 5.5
V
V
Input / output voltage
VI
VO
0 to 5.5
0 to VCC
0 to 5.5
V
V
V
Operating temperature Ta
–40 to 85
°C
Output current
IOH –12
–24*2
mA
mA
IOL 12
24*2
mA
mA
Input rise / fall time *1
tr, tf
10
ns/V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform : Refer to test circuit of switching characteristics.
2. duty cycle ≤ 50%
Conditions
Data hold
At operation
C, A
Output "H" or "L"
Output "Z" or VCC:OFF
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
3
3Pages HD74LVC125A
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 Ω
VCC
Output
500 Ω S1
CL = 450 Ω
50 pF 50 Ω Scope
OPEN
*1 See under table
GND
Note:
1. CL includes probe and jig capacitance.
Symbol
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
OPEN OPEN
GND
GND
6 V 2×Vcc
6
6 Page | |||
ページ | 合計 : 9 ページ | ||
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PDF ダウンロード | [ HD74LVC125A データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HD74LVC125A | Quad. Bus Buffer Gates with 3-state Outputs | Hitachi Semiconductor |