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HD74LV273 の電気的特性と機能

HD74LV273のメーカーはHitachi Semiconductorです、この部品の機能は「Octal D-type Flip-Flops with Clear」です。


製品の詳細 ( Datasheet PDF )

部品番号 HD74LV273
部品説明 Octal D-type Flip-Flops with Clear
メーカ Hitachi Semiconductor
ロゴ Hitachi Semiconductor ロゴ 




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HD74LV273 Datasheet, HD74LV273 PDF,ピン配置, 機能
HD74LV273A
Octal D-type Flip-Flops with Clear
ADE-205-273 (Z)
1st Edition
April 1999
Description
The HD74LV273A has eight edge trigger D-type flip-flops with clear in a 20-pin package. Data on the D
input having the specified setup and hold times is transferred to the Q output on the low to high transition
of the clock input. The clear input when low, sets all outputs to a low state. Low-voltage and high-speed
operation is suitable for battery-powered products (e.g., notebook computers), and the low-power
consumption extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Function Table
Inputs
CLR
CLK
D
Output Q
L XXL
HHH
HL L
H
Note:
X Q0
H: High level
L: Low level
X: Immaterial
: Low to high transition
: High to low transition
Q0: Output level before the indicated steady state input conditions were established.

1 Page





HD74LV273 pdf, ピン配列
HD74LV273A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
VO
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation
at Ta = 25°C (in still air)*3
I IK
I OK
IO
ICC or IGND
PT
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
±50
±25
±50
V
V
V
mA
mA
mA
mA
835 mW
Output: H or L
VCC: OFF
VI < 0
VO < 0 or VO > VCC
VO = 0 to VCC
SOP
757 TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3


3Pages


HD74LV273 電子部品, 半導体
HD74LV273A
Switching Characteristics
VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Item
Maxi-
mum
clock
fre-
quency
Propa-
gation
delay
time
Setup
time
Symbol
fmax
tPHL
tPLH / tPHL
tPHL
tPLH / tPHL
tSU
Min Typ Max Min
55 95 — 45
45 75 — 40
— 10.3 19.0 1.0
— 10.4 18.3 1.0
— 13.1 22.8 1.0
— 12.9 22.1 1.0
8.5 — — 10.5
Hold
time
Pulse
width
th
tW
4.0 — — 4.0
0.5 — — 1.0
6.5 — — 7.0
7.0 — — 8.5
Max
21.0
20.5
25.5
25.0
Unit
MHz
Test Conditions
CL = 15 pF
CL = 50 pF
ns CL = 15 pF
CL = 50 pF
ns
ns
ns
FROM
(Input)
TO
(Output)
CLR
Q
CLK
CLR
CLK
Data
Q
Q
Q
CLR inactive
CLR L
CLK H or L
6

6 Page



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共有リンク

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部品番号部品説明メーカ
HD74LV273

Octal D-type Flip-Flops with Clear

Hitachi Semiconductor
Hitachi Semiconductor
HD74LV273A

Octal D-type Flip-Flops with Clear

Hitachi Semiconductor
Hitachi Semiconductor
HD74LV27A

Triple 3-input Positive NOR Gates

Hitachi Semiconductor
Hitachi Semiconductor
HD74LV27A

Triple 3-input Positive NOR Gates

Renesas
Renesas


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