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HD74LV165AのメーカーはHitachi Semiconductorです、この部品の機能は「Parallel-Load 8-bit Shift Register」です。 |
部品番号 | HD74LV165A |
| |
部品説明 | Parallel-Load 8-bit Shift Register | ||
メーカ | Hitachi Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとHD74LV165Aダウンロード(pdfファイル)リンクがあります。 Total 17 pages
HD74LV165A
Parallel-Load 8-bit Shift Register
ADE-205-267 (Z)
1st Edition
March 1999
Description
The HD74LV165A is 8-bit serial shift register shifts data from QA to QH when clocked. Parallel inputs to
each stage are enabled by a low level at the Shift/Load input. Also included is a gated clock input and a
complementary output from the eighth bit.
Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit
function. Holding either of the clock inputs high inhibits clocking, and high enables the other clock input.
Data transfer occurs on the positive going edge of the clock. Parallel loading is inhibited as long as the
Shift/Load input is high. When taken low, data at the parallel inputs is loaded directly into the register
independent of the state of the clock.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
1 Page HD74LV165A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
VO
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation
at Ta = 25°C (in still air)*3
I IK
I OK
IO
ICC or IGND
PT
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
±50
±25
±50
V
V
V
mA
mA
mA
mA
785 mW
Output: H or L
VCC: OFF
VI < 0
VO < 0 or VO > VCC
VO = 0 to VCC
SOP
500 TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3
3Pages HD74LV165A
DC Electrical Characteristics
• Ta = –40 to 85°C
Item
Symbol
Input voltage
VIH
VIL
Output voltage VOH
VCC (V)*
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to
Max
Min
1.5
VCC × 0.7
VCC × 0.7
VCC × 0.7
—
—
—
—
VCC – 0.1
Typ
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
0.5
VCC × 0.3
VCC × 0.3
VCC × 0.3
—
Unit Test Conditions
V
V IOL = –50 µA
2.3 2.0
—
3.0 2.48 —
4.5 3.8
—
VOL
Min to
—
Max
—
—
—
—
0.1
IOL = –2 mA
IOL = –6 mA
IOL = –12 mA
IOL = 50 µA
Input current
Quiescent
supply current
IIN
ICC
2.3
3.0
4.5
0 to 5.5
5.5
—
—
—
—
—
— 0.4
IOL = 2 mA
— 0.44
IOL = 6 mA
— 0.55
IOL = 12 mA
— ±1
µA VI = 5.5 V or GND
— 20
µA VI = VCC or GND, IO = 0
Output leakage IOFF
0
—
—5
current
µA VI or VO = 0 V to 5.5 V
Input
CIN 3.3 —
capacitance
1.7 —
pF VI = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
6
6 Page | |||
ページ | 合計 : 17 ページ | ||
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部品番号 | 部品説明 | メーカ |
HD74LV165A | Parallel-Load 8-bit Shift Register | Hitachi Semiconductor |