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PDF HD74LV164A8 Data sheet ( Hoja de datos )

Número de pieza HD74LV164A8
Descripción 8-bit Parallel-out Serial-in Shift Register
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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No Preview Available ! HD74LV164A8 Hoja de datos, Descripción, Manual

HD74LV164A
8-bit Parallel-out Serial-in Shift Register
ADE-205-266 (Z)
1st Edition
March 1999
Description
The HD74LV164A is 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type
master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or
both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A
high level on one input enables the other input which will then determine the state of the first flip-flop.
Data at the serial inputs may be changed while the clock is high or low, but only information meeting the
setup and hold time but only information meeting the setup and hold time requirements will be entered.
Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse.
Clear is independent of the clock and accomplished by low level at the clear input.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

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HD74LV164A8 pdf
Logic Diagram
CLK 8
A
B
1
2
CLR 9
HD74LV164A
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
3
4
5
6 10
11 12
13
QA QB QC QD QE QF QG QH
Timing Diagram
CLR
A
B
CLK
QA
QB
QC
QD
QE
QF
QG
QH
Clear
Clear
5

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HD74LV164A8 arduino
Test Circuit
HD74LV164A
Measurement point
CL*
Note: CL includes the probe and jig capacitance.
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