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HD74LV126 の電気的特性と機能

HD74LV126のメーカーはHitachi Semiconductorです、この部品の機能は「Quad. Bus Buffer Gates with 3-state Outputs」です。


製品の詳細 ( Datasheet PDF )

部品番号 HD74LV126
部品説明 Quad. Bus Buffer Gates with 3-state Outputs
メーカ Hitachi Semiconductor
ロゴ Hitachi Semiconductor ロゴ 




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HD74LV126 Datasheet, HD74LV126 PDF,ピン配置, 機能
HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-259 (Z)
1st Edition
March 1999
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when
the associated output enable (OE) input is low. To ensure the high impedance state during power up or
power down, OE should be connected to GND through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low-voltage and high-speed operation
is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption
extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Function Table
Inputs
OE
H
H
L
Note:
H: High level
L: Low level
X: Immaterial
Z: High impedance
A
H
L
X
Output Y
H
L
Z

1 Page





HD74LV126 pdf, ピン配列
HD74LV126A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
VO
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation
at Ta = 25°C (in still air)*3
I IK
I OK
IO
ICC or IGND
PT
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
±50
±35
±70
V
V
V
mA
mA
mA
mA
785 mW
Output: H or L
VCC: OFF or Output: Z
VI < 0
VO < 0 or VO > VCC
VO = 0 to VCC
SOP
500 TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3


3Pages


HD74LV126 電子部品, 半導体
HD74LV126A
Switching Characteristics
VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Item
Propa-
gation
delay
time
Enable
time
Disable
time
Symbol Min Typ
tPLH — 7.1
tPHL
— 9.2
tZH — 7.4
tZL
— 9.5
tHZ — 5.7
tLZ
— 8.1
Max
13.0
16.5
13.0
16.5
14.7
18.2
Min
1.0
1.0
1.0
1.0
1.0
1.0
Max
15.5
18.5
15.5
18.5
17.0
20.5
Unit
ns
Test Conditions
CL = 15 pF
CL = 50 pF
ns CL = 15 pF
CL = 50 pF
ns CL = 15 pF
CL = 50 pF
VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Propa-
gation
delay
time
Enable
time
Disable
time
Symbol Min Typ
tPLH — 5.0
tPHL
— 6.4
tZH — 5.1
tZL
— 6.6
tHZ — 4.4
tLZ
— 6.1
Max
8.0
11.5
8.0
11.5
9.7
13.2
Min
1.0
1.0
1.0
1.0
1.0
1.0
Max
9.5
13.0
9.5
13.0
11.5
15.0
Unit
ns
Test Conditions
CL = 15 pF
CL = 50 pF
ns CL = 15 pF
CL = 50 pF
ns CL = 15 pF
CL = 50 pF
FROM
(Input)
A
TO
(Output)
Y
OE Y
OE Y
FROM
(Input)
A
TO
(Output)
Y
OE Y
OE Y
6

6 Page



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共有リンク

Link :


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