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PDF HD74HCT534 Data sheet ( Hoja de datos )

Número de pieza HD74HCT534
Descripción Octal D-type Flip-Flops(with inverted 3-state outputs)
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HD74HCT374/HD74HCT534
Octal D-type Flip-Flops (with 3-state outputs)/
Octal D-type Flip-Flops (with inverted 3-state outputs)
Description
These device are positive edge triggered flip-flops. The difference between HD74HCT374 and
HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs,
meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions
of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go
to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 4.5 to 5.5 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Output Control Clock
D
LH
LL
LL
X
HX
X
X : Irrelevant
Z : Off (high-impedance) state of a 3-state output.
HD74HCT374
Q
H
L
No change
Z
HD74HCT534
Q
L
H
No change
Z

1 page




HD74HCT534 pdf
HD74HCT374/HD74HCT534
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Test Conditions
Item
Maximum clock
frequency
Symbol Min Typ Max Min Max Unit VCC (V)
fmax — — 30 — 24 MHz 4.5
Propagation delay tPLH
time
t PHL
Output enable
t ZL
time
t ZH
Output disable
t LZ
time
t HZ
Setup time
t su
Hold time
th
Pulse width
tw
Output rise/fall
time
t TLH
t THL
Input capacitance Cin
— 12 28 — 35 ns 4.5
— 15 28 — 35
4.5
— 16 30 — 38 ns 4.5
— 15 30 — 38
4.5
— 13 30 — 38 ns 4.5
— 16 30 — 38
4.5
20 2 — 25 — ns 4.5
5 0 — 6 — ns 4.5
16 5 — 20 — ns 4.5
— 4 12 — 15 ns 4.5
— 5 10 — 10 pF —
Data to clock
Clock to data
Clock, output control
5

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