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PDF HD74HC77 Data sheet ( Hoja de datos )

Número de pieza HD74HC77
Descripción 4-bit Bistable Latch
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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No Preview Available ! HD74HC77 Hoja de datos, Descripción, Manual

HD74HC77
4-bit Bistable Latch
Description
The HD74HC77 is ideally suited for use as temporary storage for binary information between processing
units and input/output or indicator units. Information present at a data (D) input is transferred to the Q
output when the enable (G) is high and the Q output will follow the data input as long as the enable remains
high. When the enable goes low the information (that was present at the data input at the time the transition
occurred) is retained at the Q output until the enable is permitted to go high.
Features
High Speed Operation: tpd (D to Q) = 12 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs
D
L
H
X
G
H
H
L
Output
Q
L
H
No change

1 page




HD74HC77 pdf
19.20
20.32 Max
14
8
1 1.30 7
2.39 Max
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
0.10
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-14
Conforms
Conforms
0.97 g

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