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PDF HD74HC155 Data sheet ( Hoja de datos )

Número de pieza HD74HC155
Descripción Dual 2-to-4-line Decoders/Demultiplexers
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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No Preview Available ! HD74HC155 Hoja de datos, Descripción, Manual

HD74HC155
Dual 2-to-4-line Decoders/Demultiplexers
Description
This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address
input. When both sections are enabled by the strobes, the common binary-address inputs sequentially
select and route associated input data to the appropriate output of each section. The individual strobes
permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted
through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-
line demultiplexer without external gating.
Features
High Speed Operation: tpd (A or B to Y) = 15 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
2-line-to-4-line Decoder/1-line-to-4-line Demultiplexer
Inputs
Select
B
X
L
L
H
H
X
A
X
L
H
L
H
X
Strobe
Data
Outputs
1G 1C
HX
1Y0 1Y1 1Y2 1Y3
HHH H
L H L HH H
L H HL H H
L H HHL H
L H HHH L
XL
HHH H

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HD74HC155 pdf
HD74HC155
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Symbol
Propagation delay tPLH
time
t PHL
VCC (V)
2.0
4.5
6.0
Min Typ Max Min
— — 160 —
— 13 32 —
— — 27 —
Max Unit
200 ns
40
34
2.0 — — 160 — 200
4.5 — 15 32 — 40
6.0 — — 27 — 34
2.0 — — 145 — 180
4.5 — 14 29 — 36
6.0 — — 25 — 31
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
Test Conditions
A, B, 2C, 1G or 2G to Y
A or B to Y
1C to Y
5

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