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PDF HD74BC374A Data sheet ( Hoja de datos )

Número de pieza HD74BC374A
Descripción Octal D Type Flip Flops With 3 State Outputs
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HD74BC374A
Octal D Type Flip Flops With 3 State Outputs
ADE-205-010A(Z)
Rev. 1
March 1993
Description
The HD74BC374A provides high drivability and operation equal to or better than high speed bipolar
standard logic IC by using Bi-CMOS process. The device features low power dissipation that is about 1/5
of high speed bipolar logic IC, when the frequency is 10 MHz. The device has eight edge triger D type flip
flop with three state outputs in a 20 pin package. Data at the D inputs meeting set up reguirements, are
transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes
low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high
logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what
signals are present at the other inputs and the state of the storage elements.
Features
Input/Output are at high impedance state when power supply is off.
Built in input pull up circuit can make input pins be open, when not used.
TTL level input
Wide operating temperature range
Ta = –40 to + 85°C
Function Table
Inputs
G CK
HX
L
L
L
H : High level
L : Low level
X : Immaterial
Z : High impedance
: Low to high transition
nD
X
L
H
X
Output
nQ
Z
L
H
No change

1 page




HD74BC374A pdf
Switching Test Method (CL = 50 pF)
Item
Symbol
Ta = 25°C
VCC = 5.0 V
Min Max
Propagation
CK Q
delay time
Output enable time
Output disable time
Setup time
Hold time
Pulse width
Input capacitance
Output capacitance
t PLH
t PHL
t ZH
t ZL
t HZ
t LZ
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
CIN
CO
3.0 8.0
3.0 8.0
3.0 9.0
3.0 9.0
3.0 8.0
3.0 8.0
2.0 —
2.0 —
2.0 —
2.0 —
6.0 —
6.0 —
3.0(Typ)
15.0(Typ)
HD74BC374A
Ta = –40 to 85°C
VCC = 5.0 V ±10%
Min Max
3.0 10.0
3.0 10.0
3.0 11.0
3.0 11.0
3.0 10.0
3.0 10.0
2.0 —
2.0 —
2.0 —
2.0 —
6.0 —
6.0 —
Unit Test Conditions
ns See under figure
ns
ns
ns
ns
ns
pF VIN = VCC or GND
pF VO = VCC or GND
Test Circuit
VCC
Input
Pulse Generator
Zout = 50
Input
Pulse Generator
Zout = 50
VCC
Output
G
1Q to 8Q
1D to 8D
CL =
50 pF
CK
500
450
50 Scope
Notes:
1. CL includes probe and jig capacitance.
2. OPEN: tPLH, tPHL, tZH, tHZ, th, ts, tw
7V: tZL, tLZ
*2
OPEN
7V
5

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