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Número de pieza | HD74ALVCH16836 | |
Descripción | 20-bit Universal Bus Driver with 3-state Outputs | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74ALVCH16836 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
No Preview Available ! HD74ALVCH16836
20-bit Universal Bus Driver with 3-state Outputs
ADE-205-213 (Z)
Preliminary
1st. Edition
January 1998
Description
This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by the output enable (O E) input. The device operates in the
transparent mode when the latch enable (LE) input is low. The A data is latched if the clock (CLK) input is
held at a high or low logic level. If LE is high, the A data is stored in the latch flip flop on the low to high
transition of CLK. When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the
driver.
Active bus hold circuitry is provided to hold unused or floating inputs at a valid logic level.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
1 page Logic Diagram
OE 1
CLK 56
LE 29
A1 55
HD74ALVCH16836
1D
C1
CLK
2 Y1
To nineteen other channels
5
5 Page HD74ALVCH16836
Waveforms – 3
Output
Control
tf
90 %
Vref
10 %
tZL
Waveform - A
Vref
tZH
Waveform - B
Vref
tr
10 %
90 %
Vref
tLZ
Vref1
tHZ
Vref2
VIH
GND
≈VOH1
VOL
VOH
≈VOL1
Notes:
TEST
VIH
Vref
Vref1
Vref2
VOH1
VOL1
Vcc=2.5±0.2V
VCC
Vcc=2.7V,
3.3±0.3V
2.7 V
1/2 VCC
1.5 V
VOL +0.15 V VOL +0.3 V
VOH–0.15 V VOH–0.3 V
VCC 3.0 V
GND
GND
1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.0 ns, tf ≤ 2.0 ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform – A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
11
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet HD74ALVCH16836.PDF ] |
Número de pieza | Descripción | Fabricantes |
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HD74ALVCH16835 | 18-bit Universal Bus Driver with 3-state Outputs | Hitachi Semiconductor |
HD74ALVCH16836 | 20-bit Universal Bus Driver with 3-state Outputs | Hitachi Semiconductor |
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