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HD74ALVCH16721 の電気的特性と機能

HD74ALVCH16721のメーカーはHitachi Semiconductorです、この部品の機能は「3.3-V 20-bit Flip Flops with 3-state Outputs」です。


製品の詳細 ( Datasheet PDF )

部品番号 HD74ALVCH16721
部品説明 3.3-V 20-bit Flip Flops with 3-state Outputs
メーカ Hitachi Semiconductor
ロゴ Hitachi Semiconductor ロゴ 




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HD74ALVCH16721 Datasheet, HD74ALVCH16721 PDF,ピン配置, 機能
HD74ALVCH16721
3.3-V 20-bit Flip Flops with 3-state Outputs
ADE-205-139B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH16721’s twenty flip flops are edge triggered D-type flip flops with qualified clock
storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,
provided that the clock enable (CLKEN) input is low. If CLKEN is high, no data is stored. A buffered
output enable (OE) input can be used to place the twenty outputs in either a normal logic state (high or low
level) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus
lines significantly. The high impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components. The output enable (OE) input does not affect the internal
operation of the flip flops. Old data can be retained or new data can be entered while the outputs are in the
high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid
logic level.
Features
VCC = 2.3 V to 3.6 V
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±24 mA (@VCC = 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

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HD74ALVCH16721 pdf, ピン配列
Pin Arrangement
HD74ALVCH16721
OE 1
Q1 2
Q2 3
GND 4
Q3 5
Q4 6
VCC 7
Q5 8
Q6 9
Q7 10
GND 11
Q8 12
Q9 13
Q10 14
Q11 15
Q12 16
Q13 17
GND 18
Q14 19
Q15 20
Q16 21
VCC 22
Q17 23
Q18 24
GND 25
Q19 26
Q20 27
NC 28
(Top view)
56 CLK
55 D1
54 D2
53 GND
52 D3
51 D4
50 VCC
49 D5
48 D6
47 D7
46 GND
45 D8
44 D9
43 D10
42 D11
41 D12
40 D13
39 GND
38 D14
37 D15
36 D16
35 VCC
34 D17
33 D18
32 GND
31 D19
30 D20
29 CLKEN
3


3Pages


HD74ALVCH16721 電子部品, 半導体
HD74ALVCH16721
Electrical Characteristics (Ta = –40 to 85°C)
Item
Input voltage
Symbol VCC (V) *1
VIH 2.3 to 2.7
2.7 to 3.6
Min
1.7
2.0
Max Unit Test Conditions
—V
VIL 2.3 to 2.7 —
2.7 to 3.6 —
0.7
0.8
Output voltage
VOH Min to Max VCC–0.2 —
V IOH = –100 µA
2.3 2.0 —
IOH = –6 mA, VIH = 1.7 V
2.3 1.7 —
IOH = –12 mA, VIH = 1.7 V
2.7 2.2 —
IOH = –12 mA, VIH = 2.0 V
3.0 2.4 —
IOH = –12 mA, VIH = 2.0 V
3.0 2.0 —
IOH = –24 mA, VIH = 2.0 V
VOL Min to Max —
0.2
IOL = 100 µA
2.3 — 0.4
IOL = 6 mA, VIL = 0.7 V
2.3 — 0.7
IOL = 12 mA, VIL = 0.7 V
2.7 — 0.4
IOL = 12 mA, VIL = 0.8 V
3.0 — 0.55
IOL = 24 mA, VIL = 0.8 V
Input current
IIN 3.6
±5 µA VIN = VCC or GND
IIN (hold) 2.3
45 —
VIN = 0.7 V
2.3 –45 —
VIN = 1.7 V
3.0 75 —
VIN = 0.8 V
3.0 –75 —
VIN = 2.0 V
3.6 — ±500
VIN = 0 to 3.6 V
Off state output current *2 IOZ
3.6
±10 µA VOUT = VCC or GND
Quiescent supply current ICC
3.6
— 40 µA VIN = VCC or GND
ICC 3.0 to 3.6 —
750 µA VIN = one input at (VCC–0.6) V,
other inputs at VCC or GND
Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
2. For I/O ports, the parameter IOZ includes the input leakage current.
6

6 Page



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部品番号部品説明メーカ
HD74ALVCH16721

3.3-V 20-bit Flip Flops with 3-state Outputs

Hitachi Semiconductor
Hitachi Semiconductor


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