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PDF HD74ALVCH16260 Data sheet ( Hoja de datos )
| Número de pieza | HD74ALVCH16260 | |
| Descripción | 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74ALVCH16260
12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs
ADE-205-135B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two
separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical
applications include multiplexing and / or demultiplexing of address and data information in
microprocessor or bus interface applications. This device is also useful in memory interleaving
applications. Three 12-bit I / O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and /
or data transfer. The output enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions.
The OE1B and OE2B control signals also allow bank control in the A-to-B direction. Address and / or data
information can be stored using the internal storage latches. The latch enable (LE1B, LE2B, LEA1B, and
LEA2B) inputs are used to control data storage. When the latch enable input is high, the latch is
transparent. When the latch enable input goes low, the data present at the inputs is latched and remains
latched until the latch enable input is returned high. Active bus hold circuitry is provided to hold unused or
floating data inputs at a valid logic level.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
1 page  
Logic Diagram
LE1B
LE2B
LEA1B
LEA2B
2
27
30
55
OE2B 56
OE1B 29
OEA 1
28
SEL
8
A1
HD74ALVCH16260
G1
1
1
C1
1D
C1
1D
C1
1D
C1
1D
To eleven other channels
23
1B1
6
2B1
5
5 Page 
Package Dimensions
14.00
+0.3
–0.1
56
29
1
0.20
+0.1
–0.05
0.50
0.08 M
28
0.40 Max
0.10
HD74ALVCH16260
Unit : mm
8.10 ± 0.3
10° Max
0.50 ± 0.1
Hitachi code
EIAJ code
JEDEC code
TTP-56D
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HD74ALVCH16260.PDF ] | |
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