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HCPL2630 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HCPL2630
部品説明 Dual-Channel High Speed 10MBit/s Logic Gate Optocouplers
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 



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HCPL2630 Datasheet, HCPL2630 PDF,ピン配置, 機能
January 2011
Single-Channel: 6N137, HCPL2601, HCPL2611
Dual-Channel: HCPL2630, HCPL2631
High Speed 10MBit/s Logic Gate Optocouplers
Features
Very high speed – 10 MBit/s
Superior CMR – 10 kV/µs
Double working voltage-480V
Fan-out of 8 over -40°C to +85°C
Logic gate output
Strobable output
Wired OR-open collector
U.L. recognized (File # E90700)
Applications
Ground loop elimination
LSTTL to TTL, LSTTL or 5-volt CMOS
Line receiver, data transmission
Data multiplexing
Switching power supplies
Pulse transformer replacement
Computer-peripheral interface
Description
The 6N137, HCPL2601, HCPL2611 single-channel and
HCPL2630, HCPL2631 dual-channel optocouplers
consist of a 850 nm AlGaAS LED, optically coupled to a
very high speed integrated photo-detector logic gate with
a strobable output. This output features an open collec-
tor, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range
of -40°C to +85°C. A maximum input signal of 5mA will
provide a minimum output sink current of 13mA (fan out
of 8).
An internal noise shield provides superior common
mode rejection of typically 10kV/µs. The HCPL2601 and
HCPL2631 has a minimum CMR of 5kV/µs. The
HCPL2611 has a minimum CMR of 10kV/µs.
Schematics
Package Outlines
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7
V
E
+1
V
F1
_2
6V
O
5 GND
_3
V
F2
+4
8
V
CC
7
V
01
6V
02
5 GND
6N137
HCPL2601
HCPL2611
HCPL2630
HCPL2631
A 0.1µF bypass capacitor must be connected between pins 8 and 5(1).
8
1
8
1
8
1
Truth Table (Positive Logic)
Input
Enable
HH
LH
HL
LL
H NC
L NC
Output
L
H
H
H
L
H
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
www.fairchildsemi.com

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