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PDF PIC24FJ32GA004 Data sheet ( Hoja de datos )
| Número de pieza | PIC24FJ32GA004 | |
| Descripción | 16-Bit Flash Microcontrollers | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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PIC24FJ64GA004 Family
Data Sheet
28/44-Pin General Purpose,
16-Bit Flash Microcontrollers
2010 Microchip Technology Inc.
DS39881D
http://www.Datasheet4U.com
1 page  
Pin Diagrams (Continued)
44-Pin QFN(1)
PIC24FJ64GA004 FAMILY
RP9/SDA1/CN21/PMD3/RB9
RP22/CN18/PMA1/RC6
RP23/CN17/PMA0/RC7
RP24/CN20/PMA5/RC8
RP25/CN19/PMA6/RC9
DISVREG
VCAP/VDDCORE
PGD2/EMUD2/RP10/CN16/PMD2/RB10
PGC2/EMUC2/RP11/CN15/PMD1/RB11
AN12/RP12/CN14/PMD0/RB12
AN11/RP13/CN13/PMRD/RB13
1 33 SOSCI/RP4/CN1/RB4
2 32 TDO/PMA8/RA8
3 31 OSCO/CLKO/CN29/RA3
4 30 OSCI/CLKI/CN30/RA2
5 29 VSS
6 PIC24FJXXGA004 28 VDD
7 27 AN8/RP18/CN10/PMA2/RC2
8 26 AN7/RP17/CN9/RC1
9 25 AN6/RP16/CN8/RC0
10 24 AN5/C1IN+/RP3/SCL2/CN7/RB3
11 23 AN4/C1IN-/RP2/SDA2/CN6/RB2
Legend: RPn represents remappable peripheral pins.
Note 1: Back pad on QFN devices should be connected to Vss.
2010 Microchip Technology Inc.
DS39881D-page 5
5 Page 
PIC24FJ64GA004 FAMILY
TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ64GA004 FAMILY
Features
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
16K 32K 48K 64K 16K 32K 48K 64K
Program Memory (instructions)
5,504 11,008 16,512 22,016 5,504 11,008 16,512 22,016
Data Memory (bytes)
4096
8192
4096
8192
Interrupt Sources
(soft vectors/NMI traps)
43
(39/4)
I/O Ports
Ports A, B
Ports A, B, C
Total I/O Pins
21 35
Timers:
Total Number (16-bit)
5(1)
32-Bit (from paired 16-bit timers)
Input Capture Channels
Output Compare/PWM Channels
2
5(1)
5(1)
Input Change Notification Interrupt
21
30
Serial Communications:
UART
SPI (3-wire/4-wire)
I2C™
2(1)
2(1)
2
Parallel Communications (PMP/PSP)
Yes
JTAG Boundary Scan
Yes
10-Bit Analog-to-Digital Module
(input channels)
10
13
Analog Comparators
2
Remappable Pins
16 26
Resets (and delays)
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
Instruction Set
76 Base Instructions, Multiple Addressing Mode Variations
Packages
28-Pin SPDIP/SSOP/SOIC/QFN
44-Pin QFN/TQFP
Note 1: Peripherals are accessible through remappable pins.
2010 Microchip Technology Inc.
DS39881D-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC24FJ32GA004.PDF ] | |
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