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PDF IR2121PBF Data sheet ( Hoja de datos )

Número de pieza IR2121PBF
Descripción CURRENT LIMITING LOW SIDE DRIVER
Fabricantes International Rectifier 
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No Preview Available ! IR2121PBF Hoja de datos, Descripción, Manual

Data Sheet No. PD60018-M
IR2121 & (PbF)
CURRENT LIMITING LOW SIDE DRIVER
Features
Product Summary
Gate drive supply range from 12 to 18V
Undervoltage lockout
Current detection and limiting loop to limit driven
power transistor current
Error lead indicates fault conditions and programs
shutdown time
Output in phase with input
2.5V, 5V and 15V input logic compatible
Also available LEAD-FREE
Description
VOFFSET
IO+/-
VOUT
VCSth
ton/off (typ.)
5V max.
1A / 2A
12 - 18V
230 mV
150 & 150 ns
The IR2121 is a high speed power MOSFET and
Package
IGBT driver with over-current limiting protection cir-
cuitry. Latch immune CMOS technology enables rug-
gedized monolithic construction. Logic inputs are
compatible with standard CMOS or LSTTL outputs,
down to 2.5V logic . The output driver features a
high pulse current buf fer stage designed for mini-
mum cross-conduction. The protection circuitry de-
tects over-current in the driven power transistor and
limits the gate drive voltage. Cycle-by-cycle shut-
down is programmed by an external capacitor which
8-Lead PDIP
directly controls the time interval between detection of the over-current limiting condition and latched shut-
down. The output can be used to drive an N-channel power MOSFET or IGBT in the low side configuration.
Typical Connection
TO
LOAD
VCC
IN
(Refer to Lead
Assignments for correct
pin configuration). This/
These diagram(s) show
electrical connections
only. Please refer to our
Application Notes and
DesignTips for proper
circuit board layout.
VCC
IN
ERR
COM
VCC
OUT
CS
VS
www.irf.com
1
http://www.Datasheet4U.com

1 page




IR2121PBF pdf
IR2121 &(PbF)
IN
CS
ERR
OUT
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Test Circuit
IN
ton
50%
50%
tr
90%
toff tf
90%
OUT
10%
10%
Figure 3. Switching Time Waveform Definitions
CS
OUT
50%
t cs
90%
Figure 4. ERR Shutdown Waveform Definitions
50%
CS
tcs
HO 90%
Figure 5. CS Shutdown Waveform Definitions
www.irf.com
50%
CS
terr
ERR
50%
1.8V
dt
dt = C × dV = C × 1.8V
IERR 100 uA
Figure 6. CS to ERR Waveform Definitions
5

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IR2121PBF arduino
IR2121 &(PbF)
5.00
4.00
3.00
2.00
Max.
1.00
0.00
-50
-25
0 25 50 75
Temperature (°C)
100 125
Figure 22A. Logic “0” Input Current vs. Temperature
25.0
20.0
15.0
10.0
Max.
5.0 Typ.
0.0
-50
-25
0 25 50 75
Temperature (°C)
100 125
Figure 23A. “High” CS Bias Current vs. Temperature
5.00
4.00
3.00
2.00
Max.
1.00
0.00
10 12 14 16 18 20
VCC Logic Supply Voltage (V)
Figure 22B. Logic “0” Input Current vs. Voltage
25.0
20.0
15.0
Max.
10.0
Typ.
5.0
0.0
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 23B. “High” CS Bias Current vs. Voltage
5.00
4.00
3.00
2.00
Max.
1.00
0.00
-50
-25
0 25 50 75
Temperature (°C)
100 125
Figure 24A. “Low” CS Bias Current vs. Temperature
www.irf.com
5.00
4.00
3.00
2.00
Max.
1.00
0.00
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 24B. “Low” CS Bias Current vs. Voltage
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