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PDF AK591024AS Data sheet ( Hoja de datos )

Número de pieza AK591024AS
Descripción 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory
Fabricantes ACCUTEK 
Logotipo ACCUTEK Logotipo



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ACCUTEK
MICROCIRCUIT CORPORATION
DESCRIPTION
The Accutek AK591024 high density memory modules is a random
access memory organized in 1 Meg x 9 bit words. The assembly
consists of two 1 Meg x 4 and one 1 Meg x 1 DRAMs in surface
mount packages mounted on the front side of a printed circuit board.
The module can be configured as a leadless 30 pad SIM or a leaded
30 pin SIP. This packaging approach provides a better than 6 to 1
density increase over standard DIP packaging.
The operation of the AK591024 is identical to two 1 Meg x 4 plus one
1 Meg x 1 DRAMs. For the lower eight bits, the data input is tied to
data output and brought out separately for each 1 Meg x 4 device,
with common RAS, CAS and WE control. The OE pins are tied to
Vss which dictates the use of early-write cycles to prevent conten-
tion of D and Q. Since the Write-Enable (WE) signal must always go
low before CAS in a write cycle, Read-Write and Read-Modify-Write
operation is not possible. For the ninth bit, the data input (D9) and
data output (Q9) pins are brought out separately and controlled by a
separate PCAS for that bit. Bit nine is generally used for parity.
FEATURES
· 1,048,576 x 9 bit organization
· Optional 30 Pad SIM (Single In-Line Module) or 30 Pin leaded
SIP (Single In-Line Package)
· JEDEC standard pinout
· Common CAS, RAS and WE control for the lower eight bits
· 1024 refresh cycles/16ms
· Separate PCAS control for D9 and Q9
AK591024AS / AK591024AG
1,048,576 Word X 9 bit, CMOS
Dynamic Random Access Memory
Front View
30-Pin SIM
++
1 30
30-Pin SIP
++
1
· Power:
1.650 Watt Max Active (60 nS)
1.485 Watt Max Active (70 nS)
1.265 Watt Max Active (80 nS)
23.5 mWatt Standby (max)
· Operating free air temperature: 0o to 70oC
· Upward compatible with and AK594096 and AK5916384
· Downward compaitble with AK59256
· Functionally and Pin compatible with AK491024
PIN NOMENCLATURE
PIN ASSIGNMENT
FUNCTIONAL DIAGRAM
DQ1 - DQ8
D9
Data In / Data Out
Data In
PIN #
1
2
SYMBOL
Vcc
CAS
PIN #
16
17
SYMBOL
DQ5
A8
Q9
A0 - A9
CAS, PCAS
Data Out
Address Inputs
Column Address Strobe
3
4
5
6
DQ1
18
A9
A0 19 NC
A1 20 DQ6
DQ2
21
WE
RAS
WE
Vcc
Row Address Strobe
7
A2 22 Vss
Write Enable
5v Supply
8 A3 23 DQ7
9 Vss 24 NC
10 DQ3 25 DQ8
Vss Ground
NC No Connect
11 A4 26 Q9
12 A5 27 RAS
13 DQ4 28 PCAS
MODULE OPTIONS
14 A6 29 D9
15 A7 30 Vcc
Leadless SIM: AK591024ASP
Leaded SIP: AK591024AGP
A0 - A9 +
RAS +
CAS +
WE +
DQ1 +
DQ2 +
DQ3 +
DQ4 +
10 A0 - A9
* RAS
* CAS
* WE
* DQ1
* DQ2
* DQ3
* DQ4
OE *
DQ5 +
DQ6 +
DQ7 +
DQ8 +
A0 - A9
* RAS
* CAS
* WE
* DQ1
* DQ2
* DQ3
* DQ4
OE *
PCAS +
D9 +
Q9 +
A0 - A9
* RAS
* CAS
* WE
*D Q*
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