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CY14B116NのメーカーはCypress Semiconductorです、この部品の機能は「16-Mbit (2048 K x 8/1024 K x 16/512 K x 32) nvSRAM」です。 |
部品番号 | CY14B116N |
| |
部品説明 | 16-Mbit (2048 K x 8/1024 K x 16/512 K x 32) nvSRAM | ||
メーカ | Cypress Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとCY14B116Nダウンロード(pdfファイル)リンクがあります。 Total 30 pages
PRELIMINARY
CY14B116L/CY14B116N/CY14B116S
CY14E116L/CY14E116N/CY14E116S
16-Mbit (2048 K × 8/1024 K × 16/512 K × 32)
nvSRAM
Features
■ 16-Mbit nonvolatile static random access memory (nvSRAM)
❐ 25-ns, 30-ns and 45-ns access times
❐ Internally organized as 2048 K × 8 (CY14X116L),
1024 K × 16 (CY14X116N), 512 K × 32 (CY14X116S)
❐ Hands-off automatic STORE on power-down with only a
small capacitor
❐ STORE to QuantumTrap nonvolatile elements is initiated by
software, device pin, or AutoStore on power-down
❐ RECALL to SRAM initiated by software or power-up
■ High reliability
❐ Infinite read, write, and RECALL cycles
❐ 1 million STORE cycles to QuantumTrap
❐ Data retention: 20 years
■ Sleep mode operation
■ Low power consumption
❐ Active current of 75 mA at 45 ns
❐ Standby mode current of 650 A
❐ Sleep mode current of 10 A
■ Operating voltages:
❐ CY14B116X: VCC = 2.7 V to 3.6 V
❐ CY14E116X: VCC = 4.5 V to 5.5 V
■ Industrial temperature: –40 C to +85 C
■ Packages
❐ 44-pin thin small-outline package (TSOP II)
❐ 48-pin thin small-outline package (TSOP I)
❐ 54-pin thin small-outline package (TSOP II)
❐ 165-ball fine-pitch ball grid array (FBGA) package
■ Restriction of hazardous substances (RoHS) compliant
■ Offered speeds
❐ 44-pin TSOP II: 25 ns and 45 ns
❐ 48-pin TSOP I: 30 ns and 45 ns
❐ 54-pin TSOP II: 25 ns and 45 ns
❐ 165-ball FBGA: 25 ns and 45 ns
Functional Description
The C ypress CY14X1 16L/CY14X116N/CY14X116S i s a fast
SRAM, with a no nvolatile el ement in each memory cel l. T he
memory is organized as 2048 K bytes of 8 bits each or 1024 K
words of 16 bits each o r 512 K words of 32 bit s each . T he
embedded non volatile elemen ts inco rporate Qu antumTrap
technology, prod ucing the world’s mo st reli able nonvolatile
memory. The SRAM can be read and written an infinite number
of times. The nonvolatile d ata residin g in the nonvolatile
elements do not change when data is written to the SRAM. Data
transfers from th e SRAM to the nonvolatile e lements (the
STORE operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from th e non volatile me mory. Both th e ST ORE an d RECALL
operations are also available under software control.
Errata: The engineering samples do not meet the address hold after end of write (tHA) and static discharge voltage specifications. For information on silicon errata, see
Errata on page 33. Details include trigger conditions, devices affected, and proposed workaround.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-67793 Rev. *G
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 1, 2014http://www.Datasheet4U.com
1 Page PRELIMINARY CY14B116L/CY14B116N/CY14B116S
CY14E116L/CY14E116N/CY14E116S
Contents
Pinouts .............................................................................. 4
Pin Definitions .................................................................. 7
Device Operation .............................................................. 8
SRAM Read ....................................................................... 8
SRAM Write ....................................................................... 8
AutoStore Operation (Power-Down) ............................... 8
Hardware STORE (HSB) Operation................................. 9
Hardware RECALL (Power-Up) ....................................... 9
Software STORE ............................................................... 9
Software RECALL............................................................. 9
Sleep Mode...................................................................... 10
Preventing AutoStore..................................................... 12
Data Protection ............................................................... 12
Maximum Ratings........................................................... 13
Operating Range............................................................. 13
DC Electrical Characteristics ........................................ 13
Data Retention and Endurance ..................................... 14
Capacitance .................................................................... 14
Thermal Resistance........................................................ 14
AC Test Conditions ........................................................ 15
AC Switching Characteristics ....................................... 16
AutoStore/Power-Up RECALL Characteristics............ 20
Sleep Mode Characteristics........................................... 21
Software Controlled STORE and RECALL
Characteristics................................................................ 22
Hardware STORE Characteristics................................. 23
Truth Table For SRAM Operations................................ 24
For ×8 Configuration ................................................. 24
For ×8 Configuration ................................................. 24
For ×16 Configuration ............................................... 24
For ×16 Configuration ............................................... 25
For ×32 Configuration ............................................... 25
Ordering Information...................................................... 26
Ordering Code Definitions ......................................... 27
Package Diagrams.......................................................... 28
Acronyms ........................................................................ 32
Document Conventions ................................................. 32
Units of Measure ....................................................... 32
Errata ............................................................................... 33
Part Numbers Affected .............................................. 33
16-Mbit (2048 K × 8, 1024 K × 16, 512 K × 32)
nvSRAM Qualification Status .................................... 33
16-Mbit (2048 K × 8, 1024 K × 16) nvSRAM Errata
Summary ................................................................... 33
Document History Page ................................................. 36
Sales, Solutions, and Legal Information ...................... 38
Worldwide Sales and Design Support....................... 38
Products .................................................................... 38
PSoC® Solutions ...................................................... 38
Cypress Developer Community................................. 38
Technical Support ..................................................... 38
Document #: 001-67793 Rev. *G
Page 3 of 38
3Pages PRELIMINARY CY14B116L/CY14B116N/CY14B116S
CY14E116L/CY14E116N/CY14E116S
Pinouts (continued)
Figure 6. Pin Diagram: 165-Ball FBGA (×32)
1 2 3 4 5 6 7 8 9 10 11
A NC A6 A8 WE BA CE1 BC OE A5 A3 NC
B
NC
DQ0
DQ1
A4
BB CE2 BD
A2 NC NC DQ31
C
ZZ NC DQ4 VSS A0
A7
A1
VSS
NC
DQ27
DQ26
D
NC
DQ2
DQ5
VSS
VSS
VSS
VSS
VSS
NC
NC DQ30
E
NC
VCAP
DQ6
VCC
VSS
VSS
VSS
VCC
NC
DQ25
DQ29
F
NC
DQ3
DQ7
VCC
VCC
VSS
VCC
VCC
NC
NC DQ24
G HSB NC DQ12 VCC VCC VSS VCC VCC NC NC DQ28
H
NC
NC
VCC
VCC
VCC
VSS
VCC
VCC
VCC
NC
NC
J
NC
NC
DQ13
VCC
VCC
VSS
VCC
VCC
NC
DQ20
DQ19
K NC NC DQ8 VCC VCC VSS VCC VCC NC NC DQ18
L
NC
DQ9
DQ14
VCC
VSS
VSS
VSS
VCC
NC
NC DQ21
M
NC
NC DQ15 VSS VSS VSS VSS VSS
NC
DQ22
DQ17
N
NC
DQ10
DQ11
VSS
A11
A10
A9
VSS NC
NC DQ16
P NC NC NC A13 NC NC A18 A12 NC DQ23 NC
R NC NC A15 NC A17 NC A16 NC[7] A14 NC NC
Note
7. Address expansion for 32-Mbit. NC pin not connected to die.
Document #: 001-67793 Rev. *G
Page 6 of 38
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ CY14B116N データシート.PDF ] |
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部品番号 | 部品説明 | メーカ |
CY14B116K | 16-Mbit (2048 K x 8/1024 K x 16) nvSRAM | Cypress Semiconductor |
CY14B116L | 16-Mbit (2048 K x 8/1024 K x 16/512 K x 32) nvSRAM | Cypress Semiconductor |
CY14B116M | 16-Mbit (2048 K x 8/1024 K x 16) nvSRAM | Cypress Semiconductor |
CY14B116N | 16-Mbit (2048 K x 8/1024 K x 16/512 K x 32) nvSRAM | Cypress Semiconductor |