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MX25V512EのメーカーはMACRONIXです、この部品の機能は「512K-BIT [x 1/x 2] CMOS SERIAL FLASH」です。 |
部品番号 | MX25V512E |
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部品説明 | 512K-BIT [x 1/x 2] CMOS SERIAL FLASH | ||
メーカ | MACRONIX | ||
ロゴ | |||
このページの下部にプレビューとMX25V512Eダウンロード(pdfファイル)リンクがあります。 Total 30 pages
MX25V512E
MX25V512E
DATASHEET
P/N: PM1734
REV. 1.3, NOV. 13, 2013
1
http://www.Datasheet4U.com
1 Page MX25V512E
ELECTRICAL SPECIFICATIONS............................................................................................................................... 20
ABSOLUTE MAXIMUM RATINGS.................................................................................................................... 20
Figure 3.Maximum Negative Overshoot Waveform.......................................................................................... 20
CAPACITANCE TA = 25°C, f = 1.0 MHz............................................................................................................ 20
Figure 4. Maximum Positive Overshoot Waveform........................................................................................... 20
Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................. 21
Figure 6. OUTPUT LOADING.......................................................................................................................... 21
Table 5. DC CHARACTERISTICS ................................................................................................................... 22
Table 6. AC CHARACTERISTICS ................................................................................................................... 23
Table 7. Power-Up Timing................................................................................................................................. 24
INITIAL DELIVERY STATE............................................................................................................................... 24
Figure 7. Serial Input Timing............................................................................................................................. 24
Figure 8. Output Timing..................................................................................................................................... 24
Figure 9. Hold Timing........................................................................................................................................ 25
Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1.............................................. 25
Figure 11. Write Enable (WREN) Sequence (Command 06)............................................................................ 26
Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................. 26
Figure 13. Read Identification (RDID) Sequence (Command 9F)..................................................................... 26
Figure 14. Read Status Register (RDSR) Sequence (Command 05)............................................................... 27
Figure 15. Write Status Register (WRSR) Sequence (Command 01)............................................................... 27
Figure 16. Read Data Bytes (READ) Sequence (Command 03)..................................................................... 27
Figure 17. Read at Higher Speed (FAST_READ) Sequence (Command 0B).................................................. 28
Figure 18. Dual Output Read Mode Sequence (Command 3B)........................................................................ 28
Figure 19. Page Program (PP) Sequence (Command 02)............................................................................... 29
Figure 20. Sector Erase (SE) Sequence (Command 20).................................................................................. 30
Figure 21. Block Erase (BE) Sequence (Command 52 or D8).......................................................................... 30
Figure 22. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 31
Figure 23. Deep Power-down (DP) Sequence (Command B9)....................................................................... 31
Figure 24. Read Electronic Signature (RES) Sequence (Command AB).......................................................... 31
Figure 25. Release from Deep Power-down (RDP) Sequence (Command AB)............................................... 32
Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................. 32
Figure 27. Power-up Timing.............................................................................................................................. 33
RECOMMENDED OPERATING CONDITIONS.......................................................................................................... 34
Figure 28. AC Timing at Device Power-Up........................................................................................................ 34
Figure 29. Power-Down Sequence................................................................................................................... 35
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 36
DATA RETENTION..................................................................................................................................................... 36
LATCH-UP CHARACTERISTICS............................................................................................................................... 36
ORDERING INFORMATION....................................................................................................................................... 37
PART NAME DESCRIPTION...................................................................................................................................... 38
PACKAGE INFORMATION......................................................................................................................................... 39
REVISION HISTORY .................................................................................................................................................. 42
P/N: PM1734
REV. 1.3, NOV. 13, 2013
3
http://www.Datasheet4U.com
3Pages PIN CONFIGURATIONS
8-LAND USON (2x3mm)
CS#
SO/SIO1
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI/SIO0
8-PIN TSSOP (173mil)
CS#
SO/SIO1
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI/SIO0
8-PIN SOP (150mil)
CS#
SO/SIO1
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI/SIO0
MX25V512E
PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
SI/SIO0
Serial Data Input (for 1 x I/O)/ Serial Data
Input & Output (for Dual output mode)
SO/SIO1
Serial Data Output (for 1 x I/O)/ Serial Data
Input & Output (for Dual output mode)
SCLK Clock Input
HOLD#
Hold, to pause the device without
deselecting the device
WP# Write Protection
VCC + 3.3V Power Supply
GND Ground
P/N: PM1734
REV. 1.3, NOV. 13, 2013
6
http://www.Datasheet4U.com
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ MX25V512E データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
MX25V512C | 512K-BIT [x 1] 2.5V CMOS SERIAL FLASH | MACRONIX |
MX25V512E | 512K-BIT [x 1/x 2] CMOS SERIAL FLASH | MACRONIX |