DataSheet.jp

MX25L51245G の電気的特性と機能

MX25L51245GのメーカーはMACRONIXです、この部品の機能は「FLASH MEMORY」です。


製品の詳細 ( Datasheet PDF )

部品番号 MX25L51245G
部品説明 FLASH MEMORY
メーカ MACRONIX
ロゴ MACRONIX ロゴ 




このページの下部にプレビューとMX25L51245Gダウンロード(pdfファイル)リンクがあります。

Total 30 pages

No Preview Available !

MX25L51245G Datasheet, MX25L51245G PDF,ピン配置, 機能
PRELIMINARY
MX25L51245G
MX25L51245G
DATASHEET
P/N: PM2006
http://www.Datasheet4U.com

1 Page





MX25L51245G pdf, ピン配列
PRELIMINARY
MX25L51245G
9-25. Burst Read................................................................................................................................................ 72
9-26. Fast Boot.................................................................................................................................................. 73
9-27. Sector Erase (SE)..................................................................................................................................... 76
9-28. Block Erase (BE32K)................................................................................................................................ 77
9-29. Block Erase (BE)...................................................................................................................................... 78
9-30. Chip Erase (CE)........................................................................................................................................ 79
9-31. Page Program (PP).................................................................................................................................. 80
9-32. 4 x I/O Page Program (4PP)..................................................................................................................... 82
9-33. Deep Power-down (DP)............................................................................................................................ 83
9-34. Enter Secured OTP (ENSO)..................................................................................................................... 84
9-35. Exit Secured OTP (EXSO)........................................................................................................................ 84
9-36. Read Security Register (RDSCUR).......................................................................................................... 84
9-37. Write Security Register (WRSCUR).......................................................................................................... 84
Table 8. Security Register Definition..........................................................................................................85
9-38. Write Protection Selection (WPSEL)......................................................................................................... 86
9-39. Advanced Sector Protection..................................................................................................................... 88
9-40. Program/Erase Suspend/Resume............................................................................................................ 97
9-41. Erase Suspend......................................................................................................................................... 97
9-42. Program Suspend..................................................................................................................................... 97
9-43. Write-Resume........................................................................................................................................... 99
9-44. No Operation (NOP)................................................................................................................................. 99
9-45. Software Reset (Reset-Enable (RSTEN) and Reset (RST)).................................................................... 99
9-46. Read SFDP Mode (RDSFDP)................................................................................................................. 101
Table 9. Signature and Parameter Identification Data Values .................................................................102
Table 10. Parameter Table (0): JEDEC Flash Parameter Tables.............................................................103
Table 11. Parameter Table (1): Macronix Flash Parameter Tables...........................................................105
10. RESET................................................................................................................................................................ 107
Table 12. Reset Timing-(Power On).........................................................................................................107
Table 13. Reset Timing-(Other Operation)...............................................................................................107
11. POWER-ON STATE............................................................................................................................................ 108
12. ELECTRICAL SPECIFICATIONS....................................................................................................................... 109
Table 14. ABSOLUTE MAXIMUM RATINGS...........................................................................................109
Table 15. CAPACITANCE TA = 25°C, f = 1.0 MHz...................................................................................109
Table 16. DC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.7V ~ 3.6V) ...................... 111
Table 17. AC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.7V ~ 3.6V) ..................... 112
13. OPERATING CONDITIONS................................................................................................................................ 113
Table 18. Power-Up/Down Voltage and Timing ....................................................................................... 115
13-1. INITIAL DELIVERY STATE......................................................................................................................115
14. ERASE AND PROGRAMMING PERFORMANCE............................................................................................. 116
15. DATA RETENTION............................................................................................................................................. 116
16. LATCH-UP CHARACTERISTICS....................................................................................................................... 116
17. ORDERING INFORMATION............................................................................................................................... 117
18. PART NAME DESCRIPTION.............................................................................................................................. 118
19. PACKAGE INFORMATION................................................................................................................................. 119
20. REVISION HISTORY .......................................................................................................................................... 122
P/N: PM2006
REV. 0.01, JAN. 06, 2014
3
http://www.Datasheet4U.com


3Pages


MX25L51245G 電子部品, 半導体
PRELIMINARY
MX25L51245G
2. GENERAL DESCRIPTION
MX25L51245G is 512Mb bits serial Flash memory, which is configured as 67,108,864 x 8 internally. When it is in
two or four I/O mode, the structure becomes 268,435,456 bits x 2 or 134,217,728 bits x 4. MX25L51245G feature
a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O
mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial
access to the device is enabled by CS# input.
When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits
input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin become SIO0
pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.
The MX25L51245G MXSMIO(Serial Multi I/O) provides sequential read operation on whole chip.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256
bytes) basis, or word basis for erase command is executed on sector (4K-byte), block (32K-byte), or block (64K-byte),
or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
Advanced security features enhance the protection and security functions, please see security features section for
more details.
When the device is not in operation and CS# is high, it is put in standby mode.
The MX25L51245G utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after
100,000 program and erase cycles.
Table 1. Read performance Comparison
Numbers of
Dummy Cycles
4
6
8
10
Fast Read
(MHz)
-
133
133*
166
Dual Output
Fast Read
(MHz)
-
133
133*
166
Quad Output
Fast Read
(MHz)
-
104
133*
166
Dual IO
Fast Read
(MHz)
84*
104
133
166
Numbers of
Dummy Cycles
4
6
8
10
Fast DTR Read
(MHz)
-
66
66*
83
Dual I/O DT Read Quad I/O DT Read
(MHz)
(MHz)
52* 42
66 52*
66 66
83 83
Note: * mean default status
Quad IO
Fast Read
(MHz)
70
84*
104
133
P/N: PM2006
REV. 0.01, JAN. 06, 2014
6
http://www.Datasheet4U.com

6 Page



ページ 合計 : 30 ページ
 
PDF
ダウンロード
[ MX25L51245G データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
MX25L51245G

FLASH MEMORY

MACRONIX
MACRONIX


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap