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PDF ISL6266A Data sheet ( Hoja de datos )
| Número de pieza | ISL6266A | |
| Descripción | Two-phase Core Controllers | |
| Fabricantes | Intersil | |
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®
Data Sheet
ISL6266, ISL6266A
June 14, 2010
FN6398.3
Two-phase Core Controllers
(Montevina, IMVP-6+)
The ISL6266 and ISL6266A are two-phase buck converter
regulators implementing Intel® IMVP-6 protocol with
embedded gate drivers. Both converters use interleaved
channels to double the output voltage ripple frequency and
thereby reduce output voltage ripple amplitude with fewer
components, lower component cost, reduced power
dissipation, and smaller real estate area.
The ISL6266A utilizes the patented R3 Technology™,
Intersil’s Robust Ripple Regulator modulator. Compared with
traditional multiphase buck regulators, the R3 Technology™
has the fastest transient response. This is due to the R3
modulator commanding variable switching frequency during
load transient events.
Intel Mobile Voltage Positioning (IMVP) is a smart voltage
regulation technology, which effectively reduces power
dissipation in Intel Pentium processors. To boost battery life,
the ISL6266A supports DPRSLRVR (deeper sleep),
DPRSTP# and PSI# functions, which maximizes efficiency
by enabling different modes of operation. In active mode
(heavy load), the regulator commands the two phase
continuous conduction mode (CCM) operation. When PSI#
is asserted in active mode (medium load), the ISL6266A
operates in one-phase CCM. When the CPU enters deeper
sleep mode, the ISL6266A enables diode emulation to
maximize efficiency.
For better system power management, the ISL6266A
provides a CPU power monitor output. The analog output at
the power monitor pin can be fed into an A/D converter to
report instantaneous or average CPU power.
A 7-bit digital-to-analog converter (DAC) allows dynamic
adjustment of the core output voltage from 0.300V to 1.500V.
Over-temperature, the ISL6266A achieves a 0.5% system
accuracy of core output voltage.
A unity-gain differential amplifier is provided for remote CPU
die sensing. This allows the voltage on the CPU die to be
accurately measured and regulated per Intel IMVP-6+
specifications. Current sensing can be realized using either
lossless inductor DCR sensing or discrete resistor sensing.
A single NTC thermistor network thermally compensates the
gain and the time constant of the DCR variations.
The ISL6266 also includes all the functions for IMVP-6+
core power delivery. In addition, it has been optimized for
use with coupled-inductor solutions. More information on the
differences between ISL6266 and ISL6266A can be found in
the “Electrical Specifications” on page 3 and the “ISL6266
Features” on page 21.
Features
• Precision Two/One-phase CORE Voltage Regulator
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Internal Gate Driver with 2A Driving Capability
• Dynamic Phase Adding/Dropping
• Microprocessor Voltage Identification Input
- 7-Bit VID Input
- 0.300V to 1.500V in 12.5mV Steps
- Support VID Change On-the-Fly
• Multiple Current Sensing Schemes Supported
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• CPU Power Monitor
• Thermal Monitor
• User Programmable Switching Frequency
• Differential Remote CPU Die Voltage Sensing
• Static and Dynamic Current Sharing
• Support All Ceramic Output with Coupled Inductor
(ISL6266)
• Overvoltage, Undervoltage and Overcurrent Protection
• Pb-Free (RoHS Compliant)
Ordering Information
PART NUMBER
PART
(Note)
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6266HRZ ISL6266 HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266HRZ-T* ISL6266 HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AHRZ ISL6266A HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AHRZ-T* ISL6266A HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AIRZ ISL6266A IRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AIRZ-T* ISL6266A IRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007-2010 All Rights Reserved. R3 Technology™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Free Datasheet http://www.Datasheet4U.com
1 page  
ISL6266, ISL6266A
Electrical Specifications
PARAMETER
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. (Continued)
SYMBOL
TEST CONDITIONS
MIN
(Note 4)
LGATE Turn-on Propagation Delay
tPDHL
ISL6266AHRZ
tPDHL
ISL6266AIRZ
TA = -10°C to +100°C
PVCC = 5V, Outputs Unloaded
PVCC = 5V, Outputs Unloaded
7
5
BOOTSTRAP DIODE
Forward Voltage
Leakage
POWER GOOD and PROTECTION MONITOR
VDDP = 5V, Forward Bias Current = 2mA
VR = 16V
0.43
PGOOD Low Voltage
PGOOD Leakage Current
PGOOD Delay
Overvoltage Threshold
Severe Overvoltage Threshold
OCSET Reference Current
OC Threshold Offset
VOL
IOH
tpgd
OVH
OVHS
IPGOOD = 4mA
PGOOD = 3.3V
CLK_EN# Low to PGOOD High
VO rising above setpoint >1ms
VO rising above setpoint >0.5µs
I(RBIAS) = 10µA
DROOP rising above OCSET >120µs
-1
6.3
155
1.675
9.8
-3.5
Current Imbalance Threshold
Difference between ISEN1 and ISEN2 >1ms
Undervoltage Threshold
(VDIFF-SOFT)
UVf VO falling below setpoint for >1ms
-360
LOGIC INPUTS
VR_ON, DPRSLPVR Input Low
VR_ON, DPRSLPVR Input High
Leakage Current of VR_ON
Leakage Current of DPRSLPVR
DAC(VID0-VID6), PSI# and
DPRSTP# Input Low
VIL(3.3V)
VIH(3.3V)
IIL(3.3V)
Logic input is low
IIH(3.3V)
Logic input is high at 3.3V
IIL_DPRSLP(3.3V) DPRSLPVR input is low
IIH_DPRSLP(3.3V) DPRSLPVR input is high at 3.3V
VIL(1V)
2.3
-1
-1
DAC(VID0-VID6), PSI# and
DPRSTP# Input High
VIH(1V)
0.7
Leakage Current of DAC
(VID0-VID6), PSI# and DPRSTP#
THERMAL MONITOR
IIL(1V)
IIH(1V)
Logic input is low
Logic input is high at 1V
-1
NTC Source Current
NTC = 1.3V
53
Over-Temperature Threshold
V(NTC) falling
1.18
VR_TT# Low Output Resistance
POWER MONITOR
RTT I = 20mA
PMON Output Voltage Range
PMON Maximum Voltage
Vpmon
Vpmonmax
VSEN = 1.2V, Droop - VO = 80mV
VSEN = 1V, Droop - VO = 20mV
1.638
0.308
2.8
TYP
15
15
0.58
0.26
7.6
195
1.7
10
9
-300
0
0
0
0.45
0
0.45
60
1.2
6.5
1.680
0.350
3.0
MAX
(Note 4) UNITS
30 ns
30 ns
0.72 V
1 µA
0.4
1
8.9
235
1.725
10.2
3.5
-240
V
µA
ms
mV
V
µA
mV
mV
mV
1V
V
µA
1 µA
µA
1 µA
0.3 V
V
µA
1 µA
67 µA
1.22 V
9Ω
1.722
0.392
V
V
V
5 FN6398.3
June 14, 2010
Free Datasheet http://www.Datasheet4U.com
5 Page 
ISL6266, ISL6266A
Typical Performance Curves (Continued)
VR_ON
VSOFT
VOUT
VR_ON
VOUT
CSOFT = 15nF
FIGURE 8. SOFT-START WAVEFORM SHOWING SLEW RATE
OF 2.5mV/µs AT VID = 1V, ILOAD = 0A
VSOFT
CSOFT = 15nF
FIGURE 9. SOFT-START WAVEFORM SHOWING SLEW RATE
OF 2.5mV/µs AT VID = 1.4375V, ILOAD = 0A
CLK_EN#
IMVP-6_PWRGD
VOUT @ 1.15V
FIGURE 10. SOFT-START WAVEFORM SHOWING CLK_EN#
AND IMVP-6 PGOOD
VR_ON
VOUT
IIN
FIGURE 12. NRUSH CURRENT AT START-UP, VIN = 14.6V,
VID = 1.4375V, ILOAD = 5A
11
VIN
VOUT
IIN
FIGURE 11. 8V TO 20V INPUT LINE TRANSIENT RESPONSE,
CIN = 240µF
DPRSTP#
VID6
DPRSLPVR
VOUT
FIGURE 13. SLOW C4 EXIT WITH DELAY OF DPRSLPVR,
FROM VID1000000 (0.7V) TO 0110000 (0.9V)
FN6398.3
June 14, 2010
Free Datasheet http://www.Datasheet4U.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ISL6266A.PDF ] | |
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