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PDF NRF51822 Data sheet ( Hoja de datos )
| Número de pieza | NRF51822 | |
| Descripción | Multiprotocol Bluetooth 4.0 low energy/2.4 GHz RF SoC Product Specification | |
| Fabricantes | Nordic | |
| Logotipo |  |
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 1. Energy and 2.4 GHz SoC  Hay una vista previa y un enlace de descarga de NRF51822 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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nRF51822
Multiprotocol Bluetooth® low energy/2.4 GHz RF System on Chip
Product Specification v3.1
Key Features
Applications
• 2.4 GHz transceiver
• -93 dBm sensitivity in Bluetooth® low energy mode
• 250 kbps, 1 Mbps, 2 Mbps supported data rates
• TX Power -20 to +4 dBm in 4 dB steps
• TX Power -30 dBm Whisper mode
• 13 mA peak RX, 10.5 mA peak TX (0 dBm)
• 9.7 mA peak RX, 8 mA peak TX (0 dBm) with DC/DC
• RSSI (1 dB resolution)
• ARM® Cortex™-M0 32 bit processor
• 275 μA/MHz running from flash memory
• 150 μA/MHz running from RAM
• Serial Wire Debug (SWD)
• S100 series SoftDevice ready
• Memory
• 256 kB or 128 kB embedded flash program memory
• 16 kB or 32 kB RAM
• On-air compatibility with nRF24L series
• Flexible Power Management
• Supply voltage range 1.8 V to 3.6 V
• 4.2 μs wake-up using 16 MHz RCOSC
• 0.6 μA at 3 V OFF mode
• 1.2 μA at 3 V in OFF mode + 1 region RAM retention
• 2.6 μA at 3 V ON mode, all blocks IDLE
• 8/9/10 bit ADC - 8 configurable channels
• 31 General Purpose I/O Pins
• One 32 bit and two 16 bit timers with counter mode
• SPI Master/Slave
• Low power comparator
• Temperature sensor
• Two-wire Master (I2C compatible)
• UART (CTS/RTS)
• CPU independent Programmable Peripheral Interconnect (PPI)
• Quadrature Decoder (QDEC)
• AES HW encryption
• Real Timer Counter (RTC)
• Package variants
• QFN48 package, 6 x 6 mm
• WLCSP package, 3.50 x 3.83 mm
• WLCSP package, 3.83 x 3.83 mm
• WLCSP package, 3.50 x 3.33 mm
• Computer peripherals and I/O devices
• Mouse
• Keyboard
• Multi-touch trackpad
• Interactive entertainment devices
• Remote control
• Gaming controller
• Beacons
• Personal Area Networks
• Health/fitness sensor and monitor
devices
• Medical devices
• Key-fobs + wrist watches
• Remote control toys
Copyright © 2014 Nordic Semiconductor ASA. All rights reserved.
Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.
1 page  
nRF51822 Product Specification v3.1
Date
October 2013
May 2013
Version
2.0
1.3
Description
This version of the document will target the nRF51822 QFAA G0 revision of the chip. If you
are working with a previous revision of the chip, read version 1.3 or earlier of the
document.
Updated the following sections:
Key Feature list on the front page,
Chapter 1 “Introduction” on page 9,
Section 2.1 “Block diagram” on page 10,
Section 2.2 “Pin assignments and functions” on page 11,
Section 3.2 “Memory” on page 20,
Section 3.5 “Programmable Peripheral Interconnect (PPI)” on page 26,
Section 3.7 “GPIO” on page 30,
Section 4.1 “2.4 GHz radio (RADIO)” on page 31,
Section 4.2 “Timer/counters (TIMER)” on page 32,
Section 4.3 “Real Time Counter (RTC)” on page 32,
Section 4.10 “Serial Peripheral Interface (SPI/SPIS)” on page 34,
Section 4.12 “Universal Asynchronous Receiver/Transmitter (UART)” on page 35,
Section 4.14 “Analog to Digital Converter (ADC)” on page 35,
Section 4.15 “GPIO Task Event blocks (GPIOTE)” on page 35,
Chapter 5 “Instance table” on page 36,
Chapter 6 “Absolute maximum ratings” on page 37,
Chapter 8 “Electrical specifications” on page 39,
Section 8.1 “Clock sources” on page 39,
Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)” on page 40,
Section 8.1.3 “32 MHz crystal oscillator (32M XOSC)” on page 41,
Section 8.2 “Power management” on page 44,
Section 8.3 “Block resource requirements” on page 48,
Section 8.7 “Universal Asynchronous Receiver/Transmitter (UART) specifications” on
page 55,
Section 8.9 “Serial Peripheral Interface (SPI) Master specifications” on page 57,
Section 8.11 “GPIO Tasks and Events (GPIOTE) specifications” on page 59,
Section 8.13 “Timer (TIMER) specifications” on page 61,
Section 8.16 “Random Number Generator (RNG) specifications” on page 62,
Section 8.17 “AES Electronic Codebook Mode Encryption (ECB) specifications” on page 62,
Section 8.18 “AES CCM Mode Encryption (CCM) specifications” on page 62,
Section 8.19 “Accelerated Address Resolver (AAR) specifications” on page 62,
Section 8.21 “Quadrature Decoder (QDEC) specifications” on page 63,
Section 11.1 “PCB guidelines” on page 76,
Section 11.3 “QFAA QFN48 package” on page 79, and
Section 11.7 “CEAA WLCSP package” on page 103.
Added the following sections:
Section 3.3 “Memory Protection Unit (MPU)” on page 22,
Section 4.5 “AES CCM Mode Encryption (CCM)” on page 33,
Section 4.6 “Accelerated Address Resolver (AAR)” on page 33,
Section 4.16 “Low Power Comparator (LPCOMP)” on page 35,
Section 8.5.7 “Antenna matching network requirements” on page 54,
Section 8.8 “Serial Peripheral Interface Slave (SPIS) specifications” on page 56,
Section 8.18 “AES CCM Mode Encryption (CCM) specifications” on page 62,
Section 8.19 “Accelerated Address Resolver (AAR) specifications” on page 62, and
Section 8.24 “Low Power Comparator (LPCOMP) specifications” on page 65.
Updated schematics and BOMs in section 11.3 on page 61.
Page 5
5 Page 
2.2 Pin assignments and functions
This section describes the pin assignment and the pin functions.
2.2.1 Pin assignment QFN48
nRF51822 Product Specification v3.1
VDD 1
DCC 2
P0.30 3
P0.00 4
P0.01 5
P0.02 6
P0.03 7
P0.04 8
P0.05 9
P0.06 10
P0.07 11
VDD 12
nNQYQR5FY1WVFF8WVN52LH1402LP82
exposed die pad
36 AVDD
35 AVDD
34 VSS
33 VSS
32 ANT2
31 ANT1
30 VDD_PA
29 DEC2
28 P0.20
27 P0.19
26 P0.18
25 P0.17
Figure 2 Pin assignment - QFN48 packet
Note: VV = Variant code, HP = Build code, YYWWLL = Tracking code.
For more information, see Section 10.6 “Code ranges and values” on page 73.
Page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NRF51822.PDF ] | |
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