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HEF4720VのメーカーはNXP Semiconductorsです、この部品の機能は「256-bit/ 1-bit per word random access memories」です。 |
部品番号 | HEF4720V |
| |
部品説明 | 256-bit/ 1-bit per word random access memories | ||
メーカ | NXP Semiconductors | ||
ロゴ | |||
このページの下部にプレビューとHEF4720Vダウンロード(pdfファイル)リンクがあります。 Total 16 pages
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4720B
HEF4720V
LSI
256-bit, 1-bit per word random
access memories
Product specification
File under Integrated Circuits, IC04
January 1995
1 Page Philips Semiconductors
256-bit, 1-bit per word random access memories
Product specification
HEF4720B
HEF4720V
IDD LIMITS
See below.
FUNCTION TABLE
CS W
LH
LL
HX
O
data written
into memory
data written
into memory
Z
O MODE
complement of data write
written into memory
complement of data read
written into memory
Z inhibit
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
Z = high impedance OFF-state
PINNING
CS
W
D
A0 to A7
O
O
chip select input (active LOW)
write enable input
data input
address inputs
3-state output (active HIGH)
3-state output (active LOW)
SUPPLY VOLTAGE
HEF4720B
HEF4720V
RATING
−0,5 to 18
−0,5 to 18
RECOMMENDED OPERATING
3,0 to 15,0
4,5 to 12,5
The values given at VDD = 15 V in the following DC and
AC characteristics, are not applicable to the HEF4720V,
because of its lower supply voltage range.
STAND-BY MIN.
3
3
V
V
DC CHARACTERISTICS
VSS = 0 V
Output current
LOW
Quiescent device
current
Input leakage current
HEF4720V
HEF4720B
VDD
V
VOL
V
SYMBOL
−40
Tamb (°C)
+25
+85
MIN. MAX. MIN. MAX. MIN. MAX.
4,75 0,4
2,4 2 1,6 mA
10 0,5 IOL
15 1,5
4,8
10,0
4 3,2 mA
10 7,5 mA
5
10 IDD
15
25 25
50 50
100 100
200 µA
400 µA
800 µA
10
15 ±IIN
0,3 0,3
0,3 0,3
1 µA
1 µA
January 1995
3
3Pages Philips Semiconductors
256-bit, 1-bit per word random access memories
Read-modify-write cycle
Read enable
hold time
Output hold time
with respect to
write pulse
Read-modify-write
cycle time
VDD
V
SYMBOL MIN. TYP. MAX.
5
10 tRH
15
5
10 tVAL2
15
5
10 tRWC
15
0
0
0
60
20
15
1050
390
270
ns
ns
ns
ns
ns
ns
ns
ns
ns
Product specification
HEF4720B
HEF4720V
January 1995
Fig.3 Read cycle timing diagram.
6
6 Page | |||
ページ | 合計 : 16 ページ | ||
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PDF ダウンロード | [ HEF4720V データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HEF4720B | 256-bit/ 1-bit per word random access memories | NXP Semiconductors |
HEF4720V | 256-bit/ 1-bit per word random access memories | NXP Semiconductors |