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AT49F8192AT の電気的特性と機能

AT49F8192ATのメーカーはATMEL Corporationです、この部品の機能は「(AT49F008A / AT49F8192A) 8-megabit (1M x 8 / 512K x 16) Flash Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 AT49F8192AT
部品説明 (AT49F008A / AT49F8192A) 8-megabit (1M x 8 / 512K x 16) Flash Memory
メーカ ATMEL Corporation
ロゴ ATMEL Corporation ロゴ 




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AT49F8192AT Datasheet, AT49F8192AT PDF,ピン配置, 機能
Features
Single-voltage Operation
– 5V Read
– 5V Programming
Fast Read Access Time – 70 ns
Internal Erase/Program Control
Sector Architecture
– One 8K Word (16K Bytes) Boot Block with Programming Lockout
– Two 4K Word (8K Bytes) Parameter Blocks
– One 496K Word (992K Bytes) Main Memory Array Block
Fast Sector Erase Time – 10 seconds
Byte-by-byte or Word-by-word Programming – 10 µs Typical
Hardware Data Protection
Data Polling for End of Program Detection
Low Power Dissipation
– 50 mA Active Current
– 100 µA CMOS Standby Current
Typical 10,000 Write Cycles
8-megabit
(1M x 8/
512K x 16)
Flash Memory
Description
The AT49F008A(T) and AT49F8192A(T) are 5-volt, 8-megabit Flash memories orga-
nized as 1,048,576 words of 8 bits each or 512K words of 16 bits each. Manufactured
with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times
to 90 ns with power dissipation of just 275 mW. When deselected, the CMOS standby
current is less than 100 µA.
The device contains a user-enabled “boot block” protection feature. Two versions of
the feature are available: the AT49F008A/8192A locates the boot block at lowest
order addresses (“bottom boot”); the AT49F008AT/8192AT locates it at highest order
addresses (“top boot”).
To allow for simple in-system reprogrammability, the AT49F008A(T)/8192A(T) does
not require high-input voltages for programming. Reading data out of the device is
similar to reading from an EPROM; it has standard CE, OE and WE inputs to avoid
bus contention. Reprogramming the AT49F008A(T)/8192A(T) is performed by first
erasing a block of data and then programming on a byte-by-byte or word-by-word
basis.
Pin Configurations
Pin Name
A0 - A18
CE
OE
WE
RESET
RDY/BUSY
I/O0 - I/O14
I/O15 (A-1)
BYTE
NC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
Ready/Busy Output
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
AT49F008A
AT49F008AT
AT49F8192A
AT49F8192AT
Rev. 1199G–FLASH–11/02
1
Free Datasheet http://www.datasheetlist.com/

1 Page





AT49F8192AT pdf, ピン配列
AT49F008A(T)
Block Diagram
AT49F008A(T)/8192A(T)
VCC
GND
OE
WE
CE
RESET
ADDRESS
INPUTS
CONTROL
LOGIC
Y DECODER
X DECODER
AT49F008A
DATA INPUTS/OUTPUTS
I/O0 - I/O7
AT49F008AT
DATA INPUTS/OUTPUTS
I/O0 - I/O7
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
MAIN MEMORY
(992K BYTES)
PARAMETER
BLOCK 2
8K BYTES
PARAMETER
BLOCK 1
8K BYTES
BOOT BLOCK
16K BYTES
FFFFF
08000
07FFF
06000
05FFF
04000
03FFF
00000
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
BOOT BLOCK
16K BYTES
PARAMETER
BLOCK 1
8K BYTES
PARAMETER
BLOCK 2
8K BYTES
MAIN MEMORY
(992K BYTES)
FFFFF
FC000
FBFFF
FA000
F9FFF
F8000
F7FFF
00000
AT49F8192A(T)
Block Diagram
VCC
GND
OE
WE
CE
RESET
ADDRESS
INPUTS
CONTROL
LOGIC
Y DECODER
X DECODER
AT49F8192A
DATA INPUTS/OUTPUTS
I/O0 - I/O15
AT49F8192AT
DATA INPUTS/OUTPUTS
I/O0 - I/O15
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
MAIN MEMORY
(496K WORDS)
PARAMETER
BLOCK 2
4K WORDS
PARAMETER
BLOCK 1
4K WORDS
BOOT BLOCK
8K WORDS
7FFFF
04000
03FFF
03000
02FFF
02000
01FFF
00000
INPUT/OUTPUT
BUFFERS
PROGRAM DATA
LATCHES
Y-GATING
BOOT BLOCK
8K WORDS
PARAMETER
BLOCK 1
4K WORDS
PARAMETER
BLOCK 2
4K WORDS
MAIN MEMORY
(496K WORDS)
7FFFF
7E000
7DFFF
7D000
7CFFF
7C000
7BFFF
00000
Device
Operation
1199G–FLASH–11/02
READ: The AT49F008A(T)/8192A(T) is accessed like an EPROM. When CE and OE are low
and WE is high, the data stored at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high-impedance state whenever CE or OE
is high. This dual line control gives designers flexibility in preventing bus contention.
COMMAND SEQUENCES: When the device is first powered on, it will be reset to the read or
standby mode, depending upon the state of the control line inputs. In order to perform other
device functions, a series of command sequences are entered into the device. The command
sequences are shown in the Command Definitions table (I/O8 - I/O15 are don’t care inputs for
the command codes). The command sequences are written by applying a low pulse on the
WE or CE input with CE or WE low (respectively) and OE high. The address is latched on the
falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of
CE or WE. Standard microprocessor write timings are used. The address locations used in the
command sequences are not affected by entering the command sequences.
3
Free Datasheet http://www.datasheetlist.com/


3Pages


AT49F8192AT 電子部品, 半導体
Command Definition in Hex(1)
Command
Sequence
Bus
Cycles
1st Bus
Cycle
Addr Data
2nd Bus
Cycle
Addr Data
3rd Bus
Cycle
Addr Data
4th Bus
Cycle
Addr Data
5th Bus
Cycle
Addr Data
6th Bus
Cycle
Addr Data
Read
Chip Erase
Sector Erase
1 Addr DOUT
6 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 5555 10
6 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 SA(4) 30
Byte/Word Program
4 5555 AA 2AAA 55 5555 A0 Addr DIN
Boot Block Lockout(2) 6 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 5555 40
Product ID Entry
3 5555 AA 2AAA 55 5555 90
Product ID Exit(3)
3 5555 AA 2AAA 55 5555 F0
Product ID Exit(3)
1 xxxx F0
Notes:
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex).
The ADDRESS FORMAT in each bus cycle is as follows: A15 - A0 (Hex); A-1 and A15 - A18 (Don’t Care).
2. The boot sector has the address range 00000H to 03FFFH for the AT49F008A; FC000H to FFFFFH for the
AT49F008AT; 00000H to 01FFFH for the AT49F8192A; and 7E000H to 7FFFFH for the AT49F8192AT.
3. Either one of the Product ID Exit commands can be used.
4. SA = sector addresses: (A0 - A18)
For the AT49F008A/8192A
SA = 01XXX for BOOT BLOCK
SA = 02XXX for PARAMETER BLOCK 1
SA = 03XXX for PARAMETER BLOCK 2
SA = 7FXXX for MAIN MEMORY ARRAY
For the AT49F008AT/8192AT
SA = 7FXXX for BOOT BLOCK
SA = 7DXXX for PARAMETER BLOCK 1
SA = 7CXXX for PARAMETER BLOCK 2
SA = 7BXXX for MAIN MEMORY ARRAY
Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on RESET
with Respect to Ground ...................................-0.6V to +13.5V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
6 AT49F008A(T)/8192A(T)
1199G–FLASH–11/02
Free Datasheet http://www.datasheetlist.com/

6 Page



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共有リンク

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部品番号部品説明メーカ
AT49F8192A

(AT49F008A / AT49F8192A) 8-megabit (1M x 8 / 512K x 16) Flash Memory

ATMEL Corporation
ATMEL Corporation
AT49F8192AT

(AT49F008A / AT49F8192A) 8-megabit (1M x 8 / 512K x 16) Flash Memory

ATMEL Corporation
ATMEL Corporation


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