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PDF SPHE8281A Data sheet ( Hoja de datos )

Número de pieza SPHE8281A
Descripción DVD Songle Chip MPEG A/V Processor
Fabricantes Sunplus 
Logotipo Sunplus Logotipo



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No Preview Available ! SPHE8281A Hoja de datos, Descripción, Manual

FSoruFnDSPpUrVPoDlcLuHeSLssEins8CLogrl2Ueo8CnC1hfAKiipdMeUPnSEtGiEaAlO/V NLY
Preliminary
OCT. 04, 2004
Version 0.1
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
Free Datasheet http://www.datasheetlist.com/

1 page




SPHE8281A pdf
Preliminary
SPHE8281A/Ax(-U)
2.FEATURE
Single Chip Integrated DVD Servo and A/V Decoder
Support Dolby Digital AC3 5.1ch / DTS 5.1ch playback (with
Integrated DVD/CD Servo Controller
optional down-mixing)
Support 1x ~ 2x DVD format reading
Support Key Shift of 2 channels
Support 1x ~ 16x CD format reading
Support equalization, reverb and special sound field
Embedded 32-bit RISC Processor without external host
SDRAM controller
controller
High Performance SDRAM controller
Embedded Audio Processor supports multiple audio standards
Support 16 or 32 bit operation
Embedded I/O processor supports programmable interface
control
Embedded TV encoder with multi-channel built-in high-speed
l Yvideo DAC supports various display standards
tia LEmbedded audio ADC supports stereo analog audio input
n NBuilt-in system PLL and audio PLL generate all clock sources
required from single 27MHz input
e OSupport following disc format:
fidDVD Navigation 1.0
EDVD audio
n SSVCD (Chaoji VCD)
OKO disc
o UVCD 2.0/1.1/1.0
CCDDA / HDCD
KCDROM (game, WMA and JPEG disc)
lus CCSS/CPPM hardware
Built-in CSS hardware
p UBuilt-in CPPM C2_DCBC and C2_D/C2_E function
n LVideo Decoder
Real time MPEG4 simple profile decoding
u LReal time MPEG4 Advanced Simple Profile D1 decoding
S LDivX3.11, 4.0 and 5.x version compatible (DivX
Uhome-theater profile)
FReal time MPEG2 MP@ML decoding
Real time MPEG1 D1 (720x480x30 /720x576x25) decoding
rHardware accelerated JPEG decoding
FoAdvanced decoding and display control
Support up to 4 SDRAM devices
Support 16M/64M/128M/256M SDRAM devices
Graphics
Embedded 2D Graphics Accelerator
BitBlt, line, triangle drawing support
Display
De-interlacing of interlaced video source
Flexible vertical interpolation
Flexible horizontal interpolation with optional CIF filter
Powerful cropping and panning effect
Support YUV422, 8-bit indexed color or 16-bit direct color
format
OSD
Multiple OSD regions with different formats
Support 4/16/256 indexed color
Support 16/24-bit direct color
Support x2/x3/x4 horizontal scaling
Embedded TV encoder
Simultaneous multi-channel output
Support 480i/480p/576i/576p format
Support 640x480 VGA / 800x600 SVGA format
Support CVBS output
Support SVideo, Component (YUV / YPbPr) or RGB output
Macrovision 7.01 and Macrovision AGC v1.03 copy
protection
Interface
27MHz crystal driver
Sub-picture Decoder
16/32-bit SDRAM interface
Advanced Sub-Picture Decoder for DVD SVCD and OKO
8/16-bit ROM/FLASH/SRAM interface
Support hardware vertical scaling
UART ports
Audio Decoder
IR and VFD support
Flexible Programmable DSP Architecture
Video DAC analog output
Embedded high resolution audio quality ADC
Simultaneous 10-channel audio DAC output
Support CDDA, HDCD, and DVD-Audio
IEC958/SPDIF digital input / output
Support LPCM, PCM, and WMA playback
Analog audio input
Support MPEGI/II layer 1/2 and MPEG 2.5 playback (with
External ADC digital input interface (optional)
optional down-mixing)
Optional ATAPI and I2S interface support
Optional Parallel Port interface support
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
5
OCT. 04, 2004
Preliminary Version: 0.1
Free Datasheet http://www.datasheetlist.com/

5 Page





SPHE8281A arduino
Preliminary
SPHE8281A/Ax(-U)
4.3. Pin Description
Symbol
256pin 216pin I/O
Description
VSS_O0/ VSS_K0
53 n/a S Chip kernel logic and output shared ground pin #0
VSS_O1/ VSS_K1 70 60 S (#1)
VSS_O2/ VSS_K2 119 99 S (#2)
VSS_O3/ VSS_K3
134 114 S (#3)
VSS_O4/ VSS_K4
148 128 S (#4)
VSS_O5/ VSS_K5
170 150 S (#5)
VSS_O6/ VSS_K6
VSS_O7/ VSS_K7
l YVDD_K0
tia LVDD_K1
VDD_K2
n NVDD_K3
e OVDD_K4
fidVDD_K5
EVDD_O0
n SVDD_O1
VDD_O2
o UVDD_O3
CVDD_O4
s KVDD_O5
lu CVDD_O6
p UVDD_O7
n LVDD_O8
USB_GND
u LUSB_VDD
S LVSS_PLLA
VDD_PLLA
UVSS_PLLV
FVDD_PLLV
rVDD_TVA0
FoVDD_TVA1
202 178 S (#6)
224 n/a S (#7, not available in 216pin package)
66 n/a S Kernel logic power supply pins for chip kernel logic and input pre-driver #0
90 56 S (#1)
125 105 S (#2)
141 121 S (#3)
163 143 S (#4)
182 n/a S (#5)
45 n/a S 3.3V power supply pins for output pins #0
74 64 S (#1)
96 92 S (#2)
112 112 S (#3)
132 136 S (#4)
156 173 S (#5)
177 n/a S (#6)
197 n/a S (#7)
234 n/a S (#8)
99 79 S Ground pin for USB PLL
100 80 S 3.3V power for USB PLL and USB transceiver
103 83 S Ground pin for USB transceiver and audio PLL
104 84 S 3.3V power supply pin for audio PLL
105 85 S Ground pin for system PLL and audio PLL
106 86 S 1.8V power supply pin for system PLL
212 188 S 3.3V power supply pin for TV DAC
216 190 S (#1)
VDD_TVA2
220 194 S (#2)
VSS_TVA0
213 89 S Ground pin for TV DAC
VSS_TVA1
217 91 S (#1)
VSS_TVA2
222 96 S (#2)
VSS_ADA
192 168 S Ground pin for on-chip audio ADC
VDD_ADA
191 167 S 3.3V power supply pin for on-chip audio ADC
R_D7
46 145 I/O ROM / SRAM / flash data bus bit [7]
R_D6
47 146 I/O ROM / SRAM / flash data bus bit [6]
R_D5
48 147 I/O ROM / SRAM / flash data bus bit [5]
R_D4
49 148 I/O ROM / SRAM / flash data bus bit [4]
R_D3
50 149 I/O ROM / SRAM / flash data bus bit [3]
R_D2
51 151 I/O ROM / SRAM / flash data bus bit [2]
R_D1
52 152 I/O ROM / SRAM / flash data bus bit [1]
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
11
OCT. 04, 2004
Preliminary Version: 0.1
Free Datasheet http://www.datasheetlist.com/

11 Page







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