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HEF4093BのメーカーはNXP Semiconductorsです、この部品の機能は「Quad 2-input NAND Schmitt trigger」です。 |
部品番号 | HEF4093B |
| |
部品説明 | Quad 2-input NAND Schmitt trigger | ||
メーカ | NXP Semiconductors | ||
ロゴ | |||
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HEF4093B
Quad 2-input NAND Schmitt trigger
Rev. 9 — 15 December 2015
Product data sheet
1. General description
The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit.
The gate switches at different points for positive-going and negative-going signals. The
difference between the positive voltage (VT+) and the negative voltage (VT) is defined as
hysteresis voltage (VH).
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Schmitt trigger input discrimination
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from40 C to +85 C and 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
4. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C
Type number
Package
Name
Description
HEF4093BT
SO14
plastic small outline package; 14 leads; body width 3.9 mm
Version
SOT108-1
1 Page NXP Semiconductors
HEF4093B
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
VDD
VSS
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
14
7
7. Functional description
Description
input
input
output
supply voltage
ground (0 V)
Table 3.
Input
nA
L
L
H
H
Function table[1]
nB
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Output
nY
H
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min Max Unit
VDD supply voltage
IIK input clamping current
VI input voltage
IOK output clamping current
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
0.5 +18 V
- 10 mA
0.5 VDD + 0.5 V
- 10 mA
II/O input/output current
- 10 mA
IDD
Tstg
Tamb
Ptot
supply current
storage temperature
ambient temperature
total power dissipation
Tamb = 40 C to +125 C
SO14
-
65
40
[1] -
50
+150
+125
mA
C
C
500 mW
P power dissipation
per output
- 100 mW
[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 15 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 14
3Pages NXP Semiconductors
12. Waveforms
HEF4093B
Quad 2-input NAND Schmitt trigger
9,
LQSXW
9
WU
90
W3+/
92+
RXWSXW
92/
90
W7+/
WI
W3/+
W7/+
DDJ
Fig 4.
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
tr, tf = input rise and fall times.
Propagation delay and output transition time
Table 9. Measurement points
Supply voltage
VDD
5 V to 15 V
Input
VM
0.5VDD
Output
VM
0.5VDD
9''
9,
*
'87
92
57 &/
DDJ
Fig 5.
Test data given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
20 ns
Load
CL
50 pF
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 15 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
6 of 14
6 Page | |||
ページ | 合計 : 14 ページ | ||
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部品番号 | 部品説明 | メーカ |
HEF4093B | Quad 2-input NAND Schmitt trigger | NXP Semiconductors |
HEF4093B | Quadruple 2-input NAND Schmitt trigger | Philips |