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Datasheet HI-8151PQI PDF ( 特性, スペック, ピン接続図 )

部品番号 HI-8151PQI
部品説明 CMOS HIGH VOLTAGE DISPLAY DRIVER
メーカ Holt Integrated Circuits
ロゴ Holt Integrated Circuits ロゴ 
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HI-8151PQI Datasheet, HI-8151PQI PDF,ピン配置, 機能
February 2003
HI-8050/51, HI-8150/51
CMOS HIGH VOLTAGE DISPLAY DRIVER
GENERAL DESCRIPTION
The HI-8050, HI-8051, HI-8150 and HI-8151 are CMOS
integrated circuits designed for high voltage LCD display
drive applications. The HI-8050 & HI-8051 have TTL logic
inputs whereas the HI-8150 & HI-8151 have CMOS logic
inputs. They drive up to 38 segments at voltages between
+5 and -30 volts. The optional voltage converter on the
HI-8050 & HI-8150 can be used to generate the negative
display drive voltage. All products have test inputs to
facilitate opens and shorts testing as well as automatic
blanking of the display if the +5V power is lost.
APPLICATIONS
! Dichroic Liquid Crystal Displays
! Standard Liquid Crystal Displays
! 5 Volt Serial Data to Parallel High Voltage
! MEMS Drivers
PAD CONFIGURATION (Top View)
The HI-8050 and HI-8150 are designed to replace the
HI-8010 and HI-8020 devices in all 5 volt applications. They
offer significantly enhanced ESD protection along with a
considerably faster serial input data rate.
The data is serially clocked into the device on the negative
edge of the clock and latched in parallel to the segment
outputs on the high to low transition of the load input. Serial
output data changes on the positive edge of the clock
allowing the cascading of multiple drivers for larger dis-
plays.
The device layout supports all previous pinouts of the
HI-8010/HI-8020 products. In addition, new technology
and features afford new packaging options. Consult your
Holt Sales Representative to explore the possibilities.
FEATURES
! 4 MHz serial input data rate
! 38 segment outputs
! Cascadable
! 5 Volt inputs translated to 35 Volts
! Test pins allow hardware all "ON", all "OFF" or
alternating
! Monitors 5 volt supply and forces all
segments to "OFF" condition if lost
! Negative voltage converter available on-chip
! CMOS low power
! Military processing available
BPIN
BPOSC
VDD
N/C
CONVOSC
CONVOUT
VEE
S37
S38
S1
S2
S3
S4
S5
S6
S7
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
HI-8050PQI
HI-8150PQI
HI-8050PQT
&
HI-8150PQT
48 S27
47 S26
46 S25
45 S24
44 S23
43 S22
42 S21
41 S20
40 DOUT38
39 DOUT32
38 DOUT30
37 T2
36 T1
35 N/C
34 BPOUT
N/C
64 Pin plastic PQFP
(See page 6 for HI-8051 & HI-8151pin configurations)
FUNCTIONAL BLOCK DIAGRAM
DIN
CL
ÞÞ
CS Þ
8020OPT Þ
LD Þ
BPIN Þ
BPOSC Þ
CONTROL
LOGIC
Oscillator
Divider
Voltage
Translator
DATA IN
38 Stage
Shift Register
CLK
DOUT38
Þ DOUT32
DOUT30
LE 3 8 B i t L a t c h
Voltage
Translators
High Voltage
Drivers
High Voltage
Buffer
Þ BPOUT
38 SEGMENTS
(DS8050 Rev. D)
HOLT INTEGRATED CIRCUITS
www.holtic.com
02/03

1 Page



HI-8151PQI pdf, ピン配列
HI-8050/51, HI-8150/51
FUNCTIONAL DESCRIPTION
INPUT LOGIC
DOUT
The data is clocked into a serial shift register from the DIN in-
put on the negative edge of CL while CS is held low. LD is
normally held low and pulsed high only when data from the
shift register is parallel latched to the segment outputs. CS
must be low when LD is pulsed. The latches are transparent
while LD is high. A logic "1" in the shift register causes the
corresponding segment output to be out of phase with the
BP output. All four logic inputs are TTL compatible on the
HI-8050/51and CMOS compatible on the HI-8150/51.
BPOSC and BPIN
The user has the option of creating the backplane frequency
internally or providing a signal from an external source. For
an internal oscillator, BPIN and BPOSC are connected to-
gether and the appropriate R & C combination is applied as
shown in Figure 1. The resulting backplane frequency is ap-
proximately:
fBP = 1
. (R = 220KW, C = 220pF, fBP » 100HZ)
256 RC
The value of the resistor must be greater than 30KW.
The DOUT30, DOUT32, and DOUT38 pins are available for
cascading devices to drive more segments (See Figure 3) and
for verifying the integrity of the shift register data. The outputs
can drive 2 TTL loads. They change on the positive edge of
CL.
AUTOMATIC SEGMENTS OFF
A threshold device detects when the 5V supply is below ap-
proximately 1V and forces all the segments and the backplane
to the same level. This feature is used to discharge the VEE
capacitor when the 5V power is switched off, to prolong the life
of the LCD display.
8020OPT
The CL and CS inputs function the same as the HI-8010 and
HI-8110 product (See Figure 5) if this pin is left open or held
high. If held low, the two pins function the same as the HI-8020
and HI-8120 product (See Figure 6). This input is available
only on the HI-8050 (TTL) and HI-8150 (CMOS) products.
Alternatively, BPOSC is left open and an external backplane
signal of the desired frequency is applied to the BPIN input.
VEE & NEGATIVE VOLTAGE CONVERTER
VEE can be connected to a negative power supply. Alterna-
tively, the HI-8050 & HI-8150 have the option of generating
the VEE voltage with a built-in -25 volt negative voltage con-
verter (See Figure 2). When not used, the open CONVOSC
pin is detected and all power consuming circuitry is dis-
abled. The converter will survive a short between two seg-
ments and still maintain a VEE voltage of -20V.
TEST INPUTS
The test functions available are:
T2 T1 Display Mode
0 0 Normal
0 1 All Off
1 0 All On
1 1 Alternating On/Off Segments
The test inputs must be tied to the appropriate logic level for
correct circuit operation. Both test inputs are TTL compatible
on the HI-8050/51 and CMOS compatible on the HI-8150/51.
VDD
R
BPIN
CR
÷ 256
Q
BPOSC
C
VSS
TO BACKPLANE
TRANSLATOR
AND DRIVER
Figure 1. INTERNAL OSCILLATOR CIRCUIT
VDD
68KW
CONVOSC
OSC
RSENSE
IN5818, IN5819
Control
CONVOUT
VDD
330µH
VSS
VEE
10µF
VSS
Figure 2. OPTIONAL VOLTAGE CONVERTER
HOLT INTEGRATED CIRCUITS
3


3Pages


HI-8151PQI 電子部品, 半導体
HI-8050/51, HI-8150/51
AC ELECTRICAL CHARACTERISTICS (See Figure 7)
VDD = 5V ±5% , VEE = -25V, VSS = 0V, TA = operating temperature range (unless otherwise specified).
PARAMETER
Clock Period
Clock Pulse Width
Data In - Setup
Data In - Hold
Chip Select - Setup to Clock
Chip Select - Hold to Clock
Load - Setup to Clock
Chip Select - Setup to Load
Load Pulse Width
Chip Select - Hold to Load
Data Out Valid, from Clock
non-cascaded
cascaded
non-cascaded
cascaded
SYMBOL
tCL
tCL
tCW
tCW
tDS
tDH
tCSS
tCSH
tLS
tCSL
tLW
tLCS
tCDO
VDD
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
MIN TYP MAX
250
500
125
250
50
80
100
120
120
0
130
120
170
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
HI-8051 & HI-8151 PIN CONFIGURATIONS
(See page 1 for HI-8050 & HI-8150 pin configurations)
LD
DIN
BPIN
BPOSC
VDD
S37
S38
S1
S2
S3
S4
S5
S6
1 39
2 38
3
4
HI-8051PQI
37
36
5 HI-8151PQI 35
6
7
HI-8051PQT
34
33
8
9
&
32
31
10 HI-8151PQT 30
11 29
12 28
13 27
S26
S25
S24
S23
S22
S21
S20
DOUT 38
N/C
T2
T1
BPOUT
S19
52 Pin Plastic PQFP
HOLT INTEGRATED CIRCUITS
6

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