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AN1048D の電気的特性と機能

AN1048DのメーカーはON Semiconductorです、この部品の機能は「RC Snubber Networks」です。


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部品番号 AN1048D
部品説明 RC Snubber Networks
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AN1048D Datasheet, AN1048D PDF,ピン配置, 機能
AN1048/D
RC Snubber Networks
For Thyristor
Power Control and
Transient Suppression
By George Templeton
Thyristor Applications Engineer
http://onsemi.com
APPLICATION NOTE
INTRODUCTION
Edited and Updated
RC networks are used to control voltage transients that
could falsely turn-on a thyristor. These networks are called
snubbers.
The simple snubber consists of a series resistor and
capacitor placed around the thyristor. These components
along with the load inductance form a series CRL circuit.
Snubber theory follows from the solution of the circuit’s
differential equation.
Many RC combinations are capable of providing accept-
able performance. However, improperly used snubbers can
cause unreliable circuit operation and damage to the semi-
conductor device.
Both turn-on and turn-off protection may be necessary
for reliability. Sometimes the thyristor must function with a
range of load values. The type of thyristors used, circuit
configuration, and load characteristics are influential.
Snubber design involves compromises. They include
cost, voltage rate, peak voltage, and turn-on stress. Practi-
cal solutions depend on device and circuit physics.
STATIC
dV
dt
WHAT
IS
STATIC
dV
dt
?
Static
dV
dt
is
a
measure
of
the
ability
of
a
thyristor
to
retain a blocking state under the influence of a voltage
transient.
ǒ ǓdV
dt
DEVICE PHYSICS
s
Static
dV
dt
turn-on
is
a
consequence
of
the
Miller
effect
and regeneration (Figure 1). A change in voltage across the
junction capacitance induces a current through it. This cur-
ǒ Ǔrent is proportional to the rate of voltage change
dV
dt
. It
triggers the device on when it becomes large enough to
raise the sum of the NPN and PNP transistor alphas to unity.
A
I1 CJP
CJN
ICN IJ
NPN
IBP IA
PNP
IJ ICP
V
I2
G
dv CJ
dt G
t
IBN
IK
K
IA
+
1
*
CJ
dV
dt
(aN )
ap)
TWO TRANSISTOR MODEL
OF
SCR
CEFF + 1*(aCNJ)ap)
A
PE
NB
C
PB
NE
K
INTEGRATED
STRUCTURE
ǒ ǓFigure 6.1.
dV
dt
Model
s
© Semiconductor Components Industries, LLC, 2008
June, 2008 Rev. 3
1
Publication Order Number:
AN1048/D
Free Datasheet http://www.datasheet-pdf.com/

1 Page





AN1048D pdf, ピン配列
AN1048/D
ǒ ǓIMPROVING
dV
dt s
Static
dV
dt
can
be
improved
by
adding
an
external
resistor
from the gate to MT1 (Figure 4). The resistor provides a
path
for
leakage
and
dV
dt
induced
currents
that
originate
in
the drive circuit or the thyristor itself.
Non-sensitive devices (Figure 5) have internal shorting
resistors dispersed throughout the chip’s cathode area. This
design feature improves noise immunity and high tempera-
ture blocking stability at the expense of increased trigger
and holding current. External resistors are optional for non-
sensitive SCRs and TRIACs. They should be comparable in
size to the internal shorting resistance of the device (20 to
100 ohms) to provide maximum improvement. The internal
resistance of the thyristor should be measured with an ohm-
meter that does not forward bias a diode junction.
2200
2000
MAC 15‐8
1800 VPK = 600 V
1600
1400
1200
1000
800
600
50 60 70 80 90 100 110 120
TJ, JUNCTION TEMPERATURE (°C)
ǒ ǓdV
Figure 6J.5u.nEcxtipoonnTeenmtiapleradtut res versus
130
Sensitive gate TRIACs run 100 to 1000 ohms. With an
external
resistor,
their
dV
dt
capability
remains
inferior
to
non-sensitive devices because lateral resistance within the
gate layer reduces its benefit.
Sensitive gate SCRs (IGT t 200 μA) have no built-in
resistor. They should be used with an external resistor. The
recommended value of the resistor is 1000 ohms. Higher
ǒ Ǔvalues reduce maximum operating temperature and
dV
dt s
(Figure 6). The capability of these parts varies by more than
100 to 1 depending on gate-cathode termination.
10
MEG
1
MEG
MCR22‐006
TA = 65°C
A
10
VG
K
100
K
10K
0.001
0.01
0.1
1
10
STATIC  ddVt   (Vńms)
ǒ ǓdV
FigureG6a.t6e.-CExapthoondeentRiaelsisdttansceversus
100
A gate-cathode capacitor (Figure 7) provides a shunt
path for transient currents in the same manner as the resis-
tor. It also filters noise currents from the drive circuit and
enhances the built-in gate-cathode capacitance voltage
divider effect. The gate drive circuit needs to be able to
charge the capacitor without excessive delay, but it does
not need to supply continuous current as it would for a
resistor
that
increases
dV
dt
the
same
amount.
However,
the
capacitor does not enhance static thermal stability.
130
120
MAC 228A10
110 800 V 110°C
100
90
80
70
60
0.001
0.01
0.1
1
GATE TO MT1 CAPACITANCE (μF)
ǒ ǓdV
Figure 6.7. EtoxpMoTn1eCntaipalacitdatncseversus Gate
ǒ ǓThe maximum
dV
dt
s
improvement occurs with a short.
Actual improvement stops before this because of spreading
resistance in the thyristor. An external capacitor of about
0.1 μF allows the maximum enhancement at a higher value
of RGK.
http://onsemi.com
3
Free Datasheet http://www.datasheet-pdf.com/


3Pages


AN1048D 電子部品, 半導体
AN1048/D
ǒ ǓIMPROVING
dV
dt c
ǒ Ǔ ǒ ǓThe same steps that improve
dV
dt
s
aid
dV
dt
c
except
when stored charge dominates turn-off. Steps that reduce
the stored charge or soften the commutation are necessary
then.
Larger TRIACs have better turn-off capability than
smaller ones with a given load. The current density is lower
in the larger device allowing recombination to claim a
greater proportion of the internal charge. Also junction
temperatures are lower.
TRIACs with high gate trigger currents have greater
turn-off ability because of lower spreading resistance in the
gate layer, reduced Miller effect, or shorter lifetime.
The rate of current crossing can be adjusted by adding a
commutation softening inductor in series with the load.
Small high permeability “square loop” inductors saturate
causing no significant disturbance to the load current. The
inductor resets as the current crosses zero introducing a
large inductance into the snubber circuit at that time. This
slows the current crossing and delays the reapplication of
blocking voltage aiding turn-off.
The commutation inductor is a circuit element that
introduces time delay, as opposed to inductance, into the
circuit.
It
will
have
little
influence
on
observed
dV
dt
at
the
device. The following example illustrates the improvement
resulting from the addition of an inductor constructed by
winding 33 turns of number 18 wire on a tape wound core
(52000-1A). This core is very small having an outside
diameter of 3/4 inch and a thickness of 1/8 inch. The delay
time can be calculated from:
ts +
(N A B 10*8)
E
where:
ts = time delay to saturation in seconds.
B = saturating flux density in Gauss
A = effective core cross sectional area in cm2
N = number of turns.
For the described inductor:
ts + (33 turns) (0.076 cm2 ) (28000 Gauss)
(1 108 ) ń (175 V) + 4.0 ms.
The saturation current of the inductor does not need to be
much larger than the TRIAC trigger current. Turn-off fail-
ure will result before recovery currents become greater than
this value. This criterion allows sizing the inductor with the
following equation:
Is +
Hs
0.4
ML
pN
where :
Hs = MMF to saturate = 0.5 Oersted
ML = mean magnetic path length = 4.99 cm.
Is
+
(.5)
.4
(4.99)
p 33
+
60
mA.
SNUBBER PHYSICS
UNDAMPED NATURAL RESONANCE
w0
+
I
ǸLC
Radiansńsecond
Resonance
determines
dV
dt
and
boosts
the
peak
capacitor
voltage when the snubber resistor is small. C and L are
related
to
one
another
by
ω02.
dV
dt
scales
linearly
with
ω0
when the damping factor is held constant. A ten to one
reduction
in
dV
dt
requires
a
100
to
1
increase
in
either
component.
DAMPING FACTOR
Ǹρ
+
R
2
C
L
The damping factor is proportional to the ratio of the
circuit loss and its surge impedance. It determines the trade
off
between
dV
dt
and
peak
voltage.
Damping
factors
between
0.01 and 1.0 are recommended.
The Snubber Resistor
Damping
and
dV
dt
When
ρ
t
0.5,
the
snubber
resistor
is
small,
and
dV
dt
depends mostly on resonance. There is little improvement
in
dV
dt
for
damping
factors
less
than
0.3,
but
peak
voltage
and snubber discharge current increase. The voltage wave
has a 1-COS (θ) shape with overshoot and ringing. Maxi-
mum
dV
dt
occurs
at
a
time
later
than
t
=
0.
There
is
a
time
delay before the voltage rise, and the peak voltage almost
doubles.
When ρ u 0.5, the voltage wave is nearly exponential in
shape.
The
maximum
instantaneous
dV
dt
occurs
at
t
=
0.
There is little time delay and moderate voltage overshoot.
When
ρ
u
1.0,
the
snubber
resistor
is
large
and
dV
dt
depends mostly on its value. There is some overshoot even
through the circuit is overdamped.
High load inductance requires large snubber resistors and
small snubber capacitors. Low inductances imply small
resistors and large capacitors.
http://onsemi.com
6
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部品番号部品説明メーカ
AN1048

RC Snubber Networks

ON Semiconductor
ON Semiconductor
AN1048D

RC Snubber Networks

ON Semiconductor
ON Semiconductor


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