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HI-303 の電気的特性と機能

HI-303のメーカーはIntersil Corporationです、この部品の機能は「CMOS Analog Switches」です。


製品の詳細 ( Datasheet PDF )

部品番号 HI-303
部品説明 CMOS Analog Switches
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HI-303 Datasheet, HI-303 PDF,ピン配置, 機能
TM
Data Sheet
HI-301 thru HI-307
March 2000 File Number 3125.4
CMOS Analog Switches
The HI-301 thru HI-307 series of switches are monolithic
devices fabricated using CMOS technology and the Intersil
dielectric isolation process. These switches feature break
before-make switching, low and nearly constant ON
resistance over the full analog signal range, and low power
dissipation, (a few mW for the Hl-301 and HI-303, a few
hundred mW for the HI-307).
The HI-301 and HI-303 are TTL compatible and have a logic
“0” condition with an input less than 0.8V and a logic “1”
condition with an input greater than 4V. The HI-307 switches
are CMOS compatible and have a low state with an input
less than 3.5V and a high state with an input greater than
11V. (See pinouts for switch conditions with a logic “1” input.)
Ordering Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
HI9P0301-5
HI1-0303-2
HI1-0303-5
HI9P0303-5
HI9P0303-9
HI1-0307-5
0 to 75
-55 to 125
0 to 75
0 to 75
-40 to 85
0 to 75
14 Ld SOIC
14 Ld CERDIP
14 Ld CERDIP
14 Ld SOIC
14 Ld SOIC
14 Ld CERDIP
PKG. NO.
M14.15
F14.3
F14.3
M14.15
M14.15
F14.3
Features
• Analog Signal Range (±15V Supplies) . . . . . . . . . . ±15V
• Low Leakage at 25oC . . . . . . . . . . . . . . . . . . . . . . . 40pA
• Low Leakage at 125oC . . . . . . . . . . . . . . . . . . . . . . . 1nA
• Low On Resistance at 25oC . . . . . . . . . . . . . . . . . . . 35
• Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC
• TTL, CMOS Compatible
• Symmetrical Switch Elements
• Low Operating Power (Typ for Hl-301 and HI-303) . . 1.0mW
Applications
• Sample and Hold (i.e., Low Leakage Switching)
• Op Amp Gain Switching (i.e., Low On Resistance)
• Portable, Battery Operated Circuits
• Low Level Switching Circuits
• Dual or Single Supply Systems
Functional Diagram
IN N
S
P
D
Pinouts Switch States Shown For A Logic “1” Input
SPST HI-301
(SOIC)
TOP VIEW
NC 1
D1 2
NC 3
S1 4
NC 5
IN 6
GND 7
14 V+
13 D2
12 NC
11 S2
10 NC
9 NC
8 V-
DUAL SPDT HI-303 (CERDIP, SOIC)
HI-307 (CERDIP)
TOP VIEW
NC 1
S3 2
D3 3
D1 4
S1 5
IN1 6
GND 7
14 V+
13 S4
12 D4
11 D2
10 S2
9 IN2
8 V-
LOGIC
0
1
SW1
OFF
ON
SW2
ON
OFF
LOGIC
0
1
SW1, SW2 SW3, SW4
OFF
ON
ON OFF
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

1 Page





HI-303 pdf, ピン配列
HI-301 thru HI-307
Absolute Maximum Ratings
Voltage Between Supplies (V+ to V-) . . . . . . . . . . . . . . . .44V (±22V)
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+) +4V to (V-) -4V
Analog Input Voltage . . . . . . . . . . . . . . . . . . (V+) +1.5V to (V-) -1.5V
Typical Derating Factor . . . . . . . . . 1.5mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Temperature Range
HI-3XX-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-3XX-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
HI-3XX-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . .
95
40
SOIC Package . . . . . . . . . . . . . . . . . . . 120
N/A
Maximum Junction Temperature
Ceramic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. HI-301 and HI-303: VIN - for Logic “1” = 4V, for Logic “0” = 0.8V.
HI-307: VIN - for Logic “1” = 11V, for Logic “0” = 3.5V, Unless Otherwise Specified
PARAMETER
TEMP
(oC)
-2 -5, -9
MIN TYP MAX MIN TYP MAX UNITS
DYNAMIC CHARACTERISTICS
Switch ON Time, tON (Note 13)
Switch OFF Time, tOFF (Note 13)
Switch ON Time, tON (Note 14)
Switch OFF Time, tOFF (Note 14)
Break-Before-Make Delay, tOPEN
Charge Injection Voltage, V (Note 7)
25
-
210 300
-
210 300
ns
25
-
160 250
-
160 250
ns
25
-
160 250
-
160 250
ns
25
-
100 150
-
100 150
ns
25
- 60 -
- 60 - ns
25 - 3 - - 3 - mV
OFF Isolation (Note 6)
25
- 60 -
- 60 - dB
Input Switch Capacitance, CS(OFF)
Output Switch Capacitance, CD(OFF)
Output Switch Capacitance, CD(ON)
Digital Input Capacitance, CIN
DIGITAL INPUT CHARACTERISTICS
25
- 16 -
- 16 - pF
25
- 14 -
- 14 - pF
25
- 35 -
- 35 - pF
25 - 5 - - 5 - pF
Input Low Level, VINL (Note 13)
Input High Level, VINH (Note 13)
Input Low Level, VINL (Note 14)
Input High Level, VINH (Note 14)
Input Leakage Current (Low), IINL (Note 5)
Input Leakage Current (High), IINH (Note 5)
ANALOG SWITCH CHARACTERISTICS
Full - - 0.8 - - 0.8 V
Full 4 - - 4 - - V
Full - - 3.5 - - 3.5 V
Full 11 - - 11 - - V
Full - - 1 - - 1 µA
Full - - 1 - - 1 µA
Analog Signal Range
Full -15 - +15 -15 - +15 V
ON Resistance, rON (Note 2)
25
-
35 50
-
35 50
Full
-
40 75
-
40 75
OFF Input Leakage Current, IS(OFF) (Note 3)
25
- 0.04 1
- 0.04 5
nA
Full - 1 100 - 0.2 100 nA
3


3Pages


HI-303 電子部品, 半導体
HI-301 thru HI-307
Test Circuits and Waveforms (Continued)
5
0
VGEN = 5V
0 0.4 0.8 1.2
TIME (µs)
FIGURE 2E. VANALOG = 5V
1.6
5
0
-5 VGEN = 0V
0 0.4 0.8 1.2
TIME (µs)
FIGURE 2F. VANALOG = 0V
1.6
0
-5
VGEN = -5V
0
-5
-10
VGEN = -10V
0 0.4 0.8 1.2 1.6
TIME (µs)
0 0.4 0.8 1.2
TIME (µs)
FIGURE 2G. VANALOG = -5V
FIGURE 2H. VANALOG = -10V
NOTE:
15. If RGEN, RL or CL is increased, there will be proportional increases in rise and/or fall RC times.
FIGURE 2. SWITCHING WAVEFORMS FOR VARIOUS ANALOG INPUT VOLTAGES
1.6
S1
VS1 = +3V
VS2 = +3V S2
LOGIC
INPUT
15V V+
D1
D2
RL2
V-
GND -15V
SWITCH TYPE
HI-301, HI-303
HI-307
OUT 1
OUT 2
CL2 RL1 CL1
VINH
5V
15V
LOGIC
INPUT
0V
LOGIC “1” = SWITCH ON
VINH
0V
SWITCH
OUTPUTS
50%
0V
tOPEN
50%
RL1 = RL2 = 300
CL1 = CL2 = 33pF
50%
OUT 1
OUT 2
50%
tOPEN
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE DELAY (tOPEN)
6

6 Page



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共有リンク

Link :


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Intersil Corporation
Intersil Corporation


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