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Número de pieza | 74HC114 | |
Descripción | Dual J-K Flip-Flops | |
Fabricantes | Hitachi | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 74HC114 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! HD74HC114
Dual J-K Flip-Flops (with Preset, Common Clear and
Common Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. each flip-flop has independent J, K and preset inputs and Q and Q outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
• High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Free Datasheet http://www.datasheet-pdf.com/
1 page 19.20
20.32 Max
14
8
1 1.30 7
2.39 Max
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
–
0.10
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-14
Conforms
Conforms
0.97 g
Free Datasheet http://www.datasheet-pdf.com/
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet 74HC114.PDF ] |
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