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PDF ILI9341 Data sheet ( Hoja de datos )

Número de pieza ILI9341
Descripción a-Si TFT LCD Single Chip Driver Specification
Fabricantes ILITEK　
Logotipo ILITEK Logotipo

ILI9341 datasheet pdf


1. TFT LCD Single Chip Driver






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ILI9341
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
Specification
ILI TECHNOLOGY CORP.
8F, No. 38, Taiyuan St., Jhubei City,
Hsinchu Country 302 Taiwan R.O.C.
Tel.886-3-5600099; Fax.886-3-5670585
http://www.ilitek.com
Version: V1.11
Document No.: ILI9341_DS_V1.11.pdf
Free Datasheet http://www.datasheet4u.com/

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ILI9341 pdf
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
8.3.23. Read ID4 (D3h) ................................................................................................................. 187
8.3.24. Positive Gamma Correction (E0h)..................................................................................... 188
8.3.25. Negative Gamma Correction (E1h) ................................................................................... 189
8.3.26. Digital Gamma Control 1 (E2h) ......................................................................................... 190
8.3.27. Digital Gamma Control 2(E3h) .......................................................................................... 191
8.3.28. Interface Control (F6h) ...................................................................................................... 192
8.4 Description of Extend register command ................................................................................. 195
8.4.1 Power control A (CBh) ........................................................................................................... 195
8.4.2 Power control B (CFh)........................................................................................................... 196
8.4.3 Driver timing control A (E8h) ................................................................................................. 197
8.4.4 Driver timing control A (E9h) ................................................................................................. 198
8.4.5 Driver timing control B (EAh)................................................................................................. 199
8.4.6 Power on sequence control (EDh) ........................................................................................ 200
8.4.7 Enable 3G (F2h).................................................................................................................... 201
8.4.8 Pump ratio control (F7h) ....................................................................................................... 202
9. Display Data RAM ..................................................................................................................................... 203
9.1. Configuration ................................................................................................................................ 203
9.2. Memory to Display Address Mapping .......................................................................................... 204
9.2.1. Normal Display ON or Partial Mode ON, Vertical Scroll Mode OFF.................................. 204
9.2.2. Vertical Scroll Mode........................................................................................................... 205
9.2.3. Vertical Scroll Example...................................................................................................... 206
9.2.4. Case1: TFA+VSA+BFA < 320 ........................................................................................... 206
9.2.5. Case2: TFA+VSA+BFA = 320 (Rolling Scrolling) .............................................................. 206
9.3. MCU to memory write/read direction ........................................................................................... 208
10. Tearing Effect Output................................................................................................................................. 210
10.1. Tearing Effect Line Modes............................................................................................................ 210
10.2. Tearing Effect Line Timings .......................................................................................................... 211
11. Sleep Out – Command and Self-Diagnostic Functions of the Display Module......................................... 212
11.1. Register loading Detection ........................................................................................................... 212
11.2. Functionality Detection................................................................................................................. 213
12. Power ON/OFF Sequence ........................................................................................................................ 214
12.1. Case 1 – RESX line is held High or Unstable by Host at Power ON ........................................... 214
12.2. Case 2 – RESX line is held Low by Host at Power ON ............................................................... 215
12.3. Uncontrolled Power Off ................................................................................................................ 216
13. Power Level Definition .............................................................................................................................. 217
13.1. Power Levels................................................................................................................................ 217
13.2. Power Flow Chart......................................................................................................................... 218
14. Gamma Curves Selection ......................................................................................................................... 223
14.1. Gamma Default Values (for NW type LC) .................................................................................... 223
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
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ILI9341 arduino
RESX
I
EXTC
I
CSX
I
D/CX (SCL) I
RDX
I
WRX
(D/CX)
I
D[17:0]
I/O
SDI/SDA I/O
SDO
O
TE O
DOTCLK
VSYNC
HSYNC
DE
I
I
I
I
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
MCU
(VDDI/VSS)
This signal will reset the device and must be applied to properly
initialize the chip.
Signal is active low.
Extended command set enable.
Low: extended command set is discarded.
High: extended command set is accepted.
Please connect EXTC to VDDI to read/write extended registers
(RB0h~RCFh, RE0h~RFFh)
Chip select input pin (“Low” enable).
This pin can be permanently fixed “Low” in MPU interface mode only.
* note1,2
This pin is used to select “Data or Command” in the parallel interface
or 4-wire 8-bit serial data interface.
When DCX = ’1’, data is selected.
When DCX = ’0’, command is selected.
This pin is used serial interface clock in 3-wire 9-bit / 4-wire 8-bit
serial data interface.
Ⅰ ⅡIf not used, this pin should be connected to VDDI or VSS.
8080- /8080- system (RDX): Serves as a read signal and MCU
read data at the rising edge.
Ⅰ ⅡFix to VDDI level when not in use.
- 8080- /8080- system (WRX): Serves as a write signal and
writes data at the rising edge.
- 4-line system (D/CX): Serves as command or parameter select.
Fix to VDDI level when not in use.
18-bit parallel bi-directional data bus for MCU system and RGB
interface mode
Fix to VSS level when not in use
When IM[3] : Low, Serial in/out signal.
When IM[3] : High, Serial input signal.
The data is applied on the rising edge of the SCL signal.
If not used, fix this pin at VDDI or VSS.
Serial output signal.
The data is outputted on the falling edge of the SCL signal.
If not used, open this pin
Tearing effect output pin to synchronize MPU to frame writing,
activated by S/W command. When this pin is not activated, this pin is
low.
If not used, open this pin.
Dot clock signal for RGB interface operation.
Fix to VDDI or VSS level when not in use.
Frame synchronizing signal for RGB interface operation.
Fix to VDDI or VSS level when not in use.
Line synchronizing signal for RGB interface operation.
Fix to VDDI or VSS level when not in use.
Data enable signal for RGB interface operation.
Fix to VDDI or VSS level when not in use.
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
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