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SY75576L の電気的特性と機能

SY75576LのメーカーはMicrelです、この部品の機能は「267MHz 1:4 3.3V HCSL/LVDS Fanout Buffer」です。


製品の詳細 ( Datasheet PDF )

部品番号 SY75576L
部品説明 267MHz 1:4 3.3V HCSL/LVDS Fanout Buffer
メーカ Micrel
ロゴ Micrel ロゴ 




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SY75576L Datasheet, SY75576L PDF,ピン配置, 機能
SY75576L
267MHz 1:4 3.3V HCSL/LVDS Fanout Buffer
PrecisionEdge™
General Description
The SY75576L is a high-speed, fully differential 1:4 clock
fanout buffer optimized to provide four identical output
copies with 137fs phase jitter and maximum 50ps output-
to-output skew. Designed to be used with PCI-Express
applications, SY75576L accepts and outputs HCSL or
LVDS logic levels.
The SY75576L operates from a 3.3V ±5% power supply
and is guaranteed over the full industrial temperature
range (40°C to +85°C). It is available in a 20-pin TSSOP
lead-free package.
The SY75576L is part of Micrel’s high-speed, ultra-low
jitter, PrecisionEdge™ product line.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Functional Block Diagram
Features
Four differential pairs of LVDS or HCSL outputs
Two pairs of differential inputs accept LVDS or HCSL
logic levels
267MHz max HCSL frequency
100MHz max LVDS frequency
Ultra low phase jitter:
137fsrms, 200MHz (12kHz–20MHz)
153fsrms, 156.25MHz (12kHz–20MHz)
212fsrms, 100MHz (12kHz–20MHz)
<2ps Total_Jitterpk-pk, 200MHz (BER = 1012)
50ps output-to-output skew
3.3V ±5% power supply operation
• −40°C to +85°C operating temperature
Available in 20-pin TSSOP lead-free package
Applications
Clock distribution
PCI-Express
Servers
Switches
Routers
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2, 2013
Revision 1.0
[email protected] or (408) 955-1690
Free Datasheet http://www.datasheet4u.com/

1 Page





SY75576L pdf, ピン配列
Micrel, Inc.
SY75576L
Pin Description
Pin Number
Pin Name
1 SEL
2 VDDIN
3 IN1
4 /IN1
5 /PD
6 IN2
7 /IN2
8 OE
9 GND
10 IREF
11 /CLKD
12 CLKD
13 /CLKC
14 CLKC
15 VDD
16 GND
17 /CLKB
18 CLKB
19 /CLKA
20 CLKA
Pin Function
SEL = 0 propagates IN2, /IN2 to outputs. SEL = 1 propagates IN1, /IN1 to outputs. Internal pull-
up resistor, IN1, /IN1 is selected by default.
3.3V power supply
HCSL/LVDS input 1
HCSL/LVDS inverted input 1
PD = 0 powers down the chip and tri-states outputs. The pin is attached to an internal pull-up
resistor.
HCSL/LVDS input 2
HCSL/LVDS inverted input 2
Tri-state outputs. High = enable outputs. Low = disable outputs. Internal pull-up resistor, outputs
are enabled by default.
Ground
External resistor Rref between pin IREF and GND controls reference current
Inverted output D
Non-inverted output D
Inverted output C
Non-inverted output C
3.3V power supply
Ground
Inverted output B
Non-inverted output B
Inverted output A
Non-inverted output A
Clock Input Function Table
SEL Input Pair
0 IN2 / IN2
1 IN1/ IN1
July 2, 2013
3 Revision 1.0
[email protected] or (408) 955-1690
Free Datasheet http://www.datasheet4u.com/


3Pages


SY75576L 電子部品, 半導体
Micrel, Inc.
Phase Noise Plots
SY75576L
Phase jitter = 137fsrms, 200MHz carrier frequency; integration range: 12kHz–20MHz
July 2, 2013
6 Revision 1.0
[email protected] or (408) 955-1690
Free Datasheet http://www.datasheet4u.com/

6 Page



ページ 合計 : 11 ページ
 
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共有リンク

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部品番号部品説明メーカ
SY75576L

267MHz 1:4 3.3V HCSL/LVDS Fanout Buffer

Micrel
Micrel


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