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HIP9021 の電気的特性と機能

HIP9021のメーカーはIntersil Corporationです、この部品の機能は「Portable Battery Drive/Torque Controller for N-Channel MOSFETs in Motor Control Systems」です。


製品の詳細 ( Datasheet PDF )

部品番号 HIP9021
部品説明 Portable Battery Drive/Torque Controller for N-Channel MOSFETs in Motor Control Systems
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HIP9021 Datasheet, HIP9021 PDF,ピン配置, 機能
HIP9021
PRELIMINARY
August 1996
Portable Battery Drive/Torque Controller for
N-Channel MOSFETs in Motor Control Systems
Features
Description
• MOSFET Driver and DC Motor Controller
• Torque Control and Overload Protection
• Battery Power Supply . . . . . . . . . . . . . . . . +5V to +15V
• BiMOS IC with Low Operating Current
- Maximum Supply Current . . . . . . . . . . . . . . . . .1.5mA
- Maximum Input Leakage Currents . . . . . . . . . . 1.5µA
• 500µA Maximum Supply Current
• 1µA Maximum Input Leakage Currents
• Typical Oscillator Frequency . . . . . . . . . . . . . . . . . 5kHz
• Power-On-Reset Control
• 10mA Drive Capability for Gate Output
• Operating Temperature . . . . . . . -40oC to +85oC Range
Applications
• Portable Battery Operated Electric Drills
• Controller for Small DC Electric Motors
• Torque/Drive Controller for Inductive Loads
• Intelligent MOSFET Drive
Ordering Information
PART NUMBER
HIP9021IB
TEMP.
RANGE (oC)
PACKAGE
-40 to +85 8 Ld SOIC
PKG.
NO.
M8.15
The HIP9021IB is a dedicated Power MOSFET driver which
drives a DC motor. As a system, motor speed is controlled
while controlling torque. The primary application is drive con-
trol for portable drills while providing overload protection.
The main function of the HIP9021IB is to produce a pulse
width modulated square wave signal which drives the gate of
an N-Channel Power MOSFET. The duty-cycle is deter-
mined by the setting of an external potentiometer at the
TRIGGER (speed control) input. As the TRIGGER voltage
level is decreased the duty-cycle of the square wave and the
speed of the motor is increased.
The torque of the motor is limited by the voltage level sensed
at the drain of the external Power MOSFET. When the cur-
rent reaches an adjustable limit set at the TORQUE input,
the drive of the Power MOSFET is disabled.
The system control components include 2 adjustable poten-
tiometer controls and 2 capacitors for the operating fre-
quency and torque delay control. A fixed or battery supply
voltage in the range of 5V to 15V may be used.
The HIP9021IB is provided in a small outline plastic package
for a compact surface mount to a ceramic substrate. The
surface mount assembly can be fit directly into the trigger of
a portable electric drill.
Pinout
HIP9021IB
(SOIC)
TOP VIEW
DRAIN 1
TRIGGER 2
GND 3
OSC 4
8 VDD
7 GATE
6 DELAY
5 TORQUE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4055

1 Page





HIP9021 pdf, ピン配列
HIP9021
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to VCC +0.3V
Maximum Current, IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Maximum Transient Reverse Current, IR (10s). . . . . . . . . . . . -50mA
Operating Conditions
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
175
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(Lead Tips Only)
Typical Power Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . +5V to +15V
Operating Temperature Range . . . . . . . . . . . . . . . . . -40oC to 150oC
Typical Oscillator Frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . 5kHz
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications VDD = 7.5V, Figure 1 Test Circuit, Table 1 Conditions, TA = +25oC Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
DC Supply Current
OSC Source Current
OSC Sink Current
OSC Threshold Voltage
OSC Trigger Voltage
TRIGGER Input Leak Current
TORQUE Input Leak Current
DELAY Current at 1V
DELAY Current at 2V
DELAY Threshold Voltage
DRAIN Input Resistance
DRAIN Current
GATE Output Source Current
GATE Output Voltage
GATE Output Slew Rate
IDD
+IOSC
-IOSC
VOSC(TH)
VOSC(TR)
ITRIGGER
ITORQUE
IDELAY1
IDELAY2
VDELAY(TH)
RDRAIN
IDRAIN
IGATE
VGATE
VGATE(S/R) Measured in Typical Application Circuit,
Duty Cycle = 50%, See Figure 2
0.1
19
-32
4.75
2.30
-
-
1.5
1
1.8
150
1
10
6.5
-
1.2
25
-25
4.95
2.45
0.02
0.02
3.4
32
1.9
260
1.7
18
7.4
10
3.1
32
-19
5.25
2.65
1.5
1.5
6
50
2
350
4.6
-
-
-
mA
µA
µA
V
V
µA
µA
µA
mA
V
k
mA
mA
V
V/µs
DELAY Output Framed Pulse
Duty Cycle
FP/DC
Gate Duty Cycle = 50%;
VTORQUE = GND; VDRAIN = VGATE;
- 44 -
DELAY =10kto GND, Refer to Figure 1
DELAY Output Framed Pulse De-
lay, VGATE to VDELAY
FP/DLY
for the Test circuit and Timing Diagram of
the DELAY Output Pulse Frame.
-
3
-
Typical Oscillator Frequency
fOSC
TA = 25oC
-
5
-
TA = -40oC
-
7.2
-
TA = 85oC
-
3.6
-
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
%
%
kHz
kHz
kHz
3


3Pages


HIP9021 電子部品, 半導体
HIP9021
Functional Description
Oscillator
The Oscillator triangle waveform is generated by the charge
and discharge of a 1nF external capacitor connected to the
OSC pin. The OSC terminal has a source and sink drive from a
current mirror which delivers ±25µA. The charge and discharge
of the external capacitor is controlled by 2 comparators which
compare respectively VOSC with 2/3 VDD and VOSC with 1/3
VDD. The period of the triangle wave is nominally 200µs.
Gate Driver
The TRIGGER input signal is compared from the triangle
waveform of the oscillator to produce a square wave signal.
The duty cycle of the GATE drive signal is increased as the
TRIGGER input level increases. The output of the compara-
tor is then NANDed with a GATE Control signal which can
enable or disable the GATE output. The NAND gate output is
buffered to deliver 18mA typical GATE drive current.
Torque Effect
The triangle signal, after going through a divider, is also
compared with TRIGGER input level. This produces another
square wave of the same period but with a duty-cycle that is
smaller than the GATE by ~5%. This square wave is used to
enable the comparison between DRAIN and TORQUE
inputs while the MOSFET is conducting.
A torque effect condition exists when 80% of the DRAIN sig-
nal is higher than the TORQUE input level set voltage of the
potentiometer. During this time, the external delay capacitor of
3.3µF is charged through an internal 100K resistor. When the
voltage at the DELAY pin reaches 0.25 x VDD, the RS flip-flop
is then set and the Gate Control (GC) signal shown in Figure
3 goes to low. The Output GATE drive signal is then disabled.
This situation remains even if the voltage on the DELAY pin
stays under 0.25 x VDD for a sustained period of time.
At the same time, when the RS flip-flop is set, the external
capacitor at the DELAY pin is discharged via the nMOS
device, Q2 which is driven by the Q output of the flip-flop.
Power-On Reset (POR)
In reference to Figure 3, the power on of the chip will cause
the reset of the RS Gate Control flip-flop when Q1 is
switched low. As an initial condition, the Gate Control (GC)
signal is reset high. Since power on is the only way to reset
the RS flip-flop, a disabled GATE drive signal due to a torque
effect condition requires a switched (trigger) reset.
The POR (power on reset) threshold requires that VDD be less
than 2V to initiate a reset. The POR circuit is based on the
behavior of the voltage reference cell that produces a constant
1.15V (REF. BIAS) when VDD is over 2V. When Q1 is forward
biased, the Q1 drain voltage goes low to reset the input of the
RS flip-flop.
TORQUE
φ
PULL
DOWN φ
50K
200K
6K
2K
VDD
-
+ LOAD
COMP
φ
100K
φ 330K
REF.
BIAS
1.15V
Q1
150K
R
POR
+
-
DELAY
COMP
S
Q Q2
Q GATE
CONTROL
(GC)
DELAY
3.3µF
VBATT
MOTOR
DRAIN
TRIGGER
OSC
+
-
BUF
15K
POWER
MOSFET
GATE
OSC
1nF
2K -
+
40K
φ
φ
FIGURE 3. DETAILED LOGIC DIAGRAM OF THE PORTABLE DRIVE/TORQUE CONTROLLER FOR N-CHANNEL POWER MOSFETS
SHOWING THE DRAIN AND TORQUE, THE GATE CONTROL LOGIC AND THE TRIGGER (SPEED) CONTROL.
6

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