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HIP6021 の電気的特性と機能

HIP6021のメーカーはIntersil Corporationです、この部品の機能は「Advanced PWM and Triple Linear Power Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 HIP6021
部品説明 Advanced PWM and Triple Linear Power Controller
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HIP6021 Datasheet, HIP6021 PDF,ピン配置, 機能
Data Sheet
HIP6021
February 1999
File Number 4684
Advanced PWM and Triple Linear Power
Controller
The HIP6021 provides the power control and protection for
four output voltages in high-performance, graphics intensive
microprocessor and computer applications. The IC
integrates a voltage-mode PWM controller and three linear
controllers, as well as the monitoring and protection
functions into a 28-pin SOIC package. The PWM controller
regulates the microprocessor core voltage with a
synchronous-rectified buck converter. The linear controllers
regulate the computer system’s AGP 1.5V or 3.3V bus
power, the 1.5V GTL bus power, and the 1.8V power for the
North/South Bridge core voltage and/or cache memory
circuits. The HIP6021 includes an Intel-compatible, TTL
5-input digital-to-analog converter (DAC) that adjusts the
core PWM output voltage from 1.3VDC to 2.05VDC in 0.05V
steps and from 2.1VDC to 3.5VDC in 0.1V increments. The
precision reference and voltage-mode control provide ±1%
static regulation. The AGP bus power linear controller’s
output (VOUT2) is user-selectable, through a TTL-compatible
signal applied at the SELECT pin, for levels of 1.5V or 3.3V
with ±3% accuracy. Based on the status of the FIX pin, the
other two linear regulators provide either fixed output
voltages of 1.5V±3% (VOUT3) and 1.8V±3% (VOUT4), or
user-adjustable by means of an external resistor divider. All
linear controllers can employ either N-channel MOSFETs or
bipolar NPNs for the pass transistor.
The HIP6021 monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controller’s over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
rDS(ON).
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
PKG.
NO.
HIP6021CB
0 to 70 28 Ld SOIC
M28.3
HIP6021EVAL1 Evaluation Board
Applications
Motherboard Power Regulation for Computers
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, AGP Bus, Memory, and GTL Bus
Power
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors
• Fixed or Externally Resistor-Adjustable Linear Outputs
(FIX Pin)
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- Other Outputs: ±3% Over Temperature
• TTL-Compatible 5-Bit DAC Microprocessor Core Output
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3VDC to 3.5VDC
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Switching Regulator Does Not Require Extra Current
Sensing Element, Uses MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable From
50kHz to Over 1MHz
- Small External Component Count
Pinout
HIP6021 (SOIC)
TOP VIEW
DRIVE2 1
FIX 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
PGOOD 8
SD 9
VSEN2 10
SELECT 11
SS 12
FAULT/RT 13
VSEN4 14
28 VCC
27 UGATE
26 PHASE
25 LGATE
24 PGND
23 OCSET
22 VSEN1
21 FB
20 COMP
19 VSEN3
18 DRIVE3
17 GND
16 VAUX
15 DRIVE4
2-296
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 Page





HIP6021 pdf, ピン配列
Simplified Power System Diagram
+5VIN
+3.3VIN
VOUT2
Q3
VOUT3
Q4
HIP6021
LINEAR
CONTROLLER
PWM
CONTROLLER
HIP6021
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
Q2
Q5 VOUT4
Typical Application
+12VIN
+5VIN
LIN
CIN
+3.3VIN
VOUT2
1.5V OR 3.3V
Q3
COUT2
DRIVE2
VSEN2
TYPEDET
VOUT3
1.5V
Q4
COUT3
VOUT4
1.8V
COUT4
Q5
SELECT
VAUX
DRIVE3
VSEN3
FIX
DRIVE4
VSEN4
CSS
SS
VCC
HIP6021
GND
OCSET
PGOOD
UGATE
PHASE
LGATE
PGND
VSEN1
FB
COMP
POWERGOOD
Q1
LOUT1
VOUT1
1.3V TO 3.5V
Q2 COUT1
FAULT / RT
VID0
VID1
VID2
VID3
VID4
2-298


3Pages


HIP6021 電子部品, 半導体
HIP6021
Functional Pin Descriptions
VCC (Pin 28)
Provide a 12V bias supply for the IC to this pin. This pin also
provides the gate bias charge for all the MOSFETs
controlled by the IC. The voltage at this pin is monitored for
Power-On Reset (POR) purposes.
GND (Pin 17)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGND (Pin 24)
This is the power ground connection. Tie the synchronous
PWM converter’s lower MOSFET source to this pin.
VAUX (Pin 16)
This pin provides boost current for the linear regulators’
output drives in the event bipolar NPN transistors (instead
of N-channel MOSFETs) are employed as pass elements.
The voltage at this pin is monitored for power-on reset
(POR) purposes.
SS (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the converter.
FAULT / RT (Pin 13)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (RT) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs 200KHz + -R5----T-×---(--1k---0----6--)
(RT to GND)
Conversely, connecting a resistor from this pin to VCC
reduces the switching frequency according to the following
equation:
Fs 200KHz R-4----T-×---(--1k---0----7--)
(RT to 12V)
Nominally, the voltage at this pin is 1.26V. In the event of an
over-voltage or over-current condition, this pin is internally
pulled to VCC.
PGOOD (Pin 8)
PGOOD is an open collector output used to indicate the
status of the output voltages. This pin is pulled low when the
synchronous regulator output is not within ±10% of the
DACOUT reference voltage or when any of the other outputs
are below their under-voltage thresholds.
The PGOOD output is open for ‘11111’ VID code.
SD (Pin 9)
This pin shuts down all the outputs. A TTL-compatible, logic
level high signal applied at this pin immediately discharges
the soft-start capacitor, disabling all the outputs. Dedicated
internal circuitry insures the core output voltage does not go
negative during this process. When re-enabled, the IC
undergoes a new soft-start cycle. Left open, this pin is pulled
low by an internal pull-down resistor, enabling operation.
FIX (Pin 2)
Grounding this pin bypasses the internal resistor dividers
that set the output voltage of the 1.5V and 1.8V linear
regulators. This way, the output voltage of the two regulators
can be adjusted from 1.26V up to the input voltage (+3.3V or
+5V) by way of an external resistor divider connected at the
corresponding VSEN pin. The new output voltage set by the
external resistor divider can be determined using the
following formula:
VOUT
=
1.265
V
×
1
+
R-R----GO-----NU----DT--
where ROUT is the resistor connected from VSEN to the
output of the regulator, and RGND is the resistor connected
from VSEN to ground. Left open, the FIX pin is pulled high,
enabling fixed output voltage operation.
VID0, VID1, VID2, VID3, VID4 (Pins 7, 6, 5, 4 and 3)
VID0-4 are the TTL-compatible input pins to the 5-bit DAC.
The logic states of these five pins program the internal
voltage reference (DACOUT). The level of DACOUT sets the
microprocessor core converter output voltage, as well as the
coresponding PGOOD and OVP thresholds.
OCSET (Pin 23)
Connect a resistor from this pin to the drain of the respective
upper MOSFET. This resistor, an internal 200µA current
source, and the upper MOSFET’s on-resistance set the
converter over-current trip point. An over-current trip cycles
the soft-start function.
The voltage at this pin is monitored for power-on reset (POR)
purposes and pulling this pin low with an open drain device
will shutdown the IC.
PHASE (Pin 26)
Connect the PHASE pin to the PWM converter’s upper
MOSFET source. This pin represents the gate drive return
current path and is used to monitor the voltage drop across
the upper MOSFET for over-current protection.
UGATE (Pin 27)
Connect UGATE pin to the PWM converter’s upper MOSFET
gate. This pin provides the gate drive for the upper MOSFET.
LGATE (Pin 25)
Connect LGATE to the PWM converter’s lower MOSFET
gate. This pin provides the gate drive for the lower MOSFET.
COMP and FB (Pin 20, and 21)
COMP and FB are the available external pins of the PWM
converter error amplifier. The FB pin is the inverting input of the
2-301

6 Page



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