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HIP6020EVAL1 の電気的特性と機能

HIP6020EVAL1のメーカーはIntersil Corporationです、この部品の機能は「Advanced Dual PWM and Dual Linear Power Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 HIP6020EVAL1
部品説明 Advanced Dual PWM and Dual Linear Power Controller
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HIP6020EVAL1 Datasheet, HIP6020EVAL1 PDF,ピン配置, 機能
Data Sheet
HIP6020
February 1999
File Number 4683
Advanced Dual PWM and Dual Linear
Power Controller
The HIP6020 provides the power control and protection for
four output voltages in high-performance, graphics intensive
microprocessor and computer applications. The IC
integrates two PWM controllers and two linear controllers, as
well as the monitoring and protection functions into a 28-pin
SOIC package. One PWM controller regulates the
microprocessor core voltage with a synchronous-rectified
buck converter. The second PWM controller supplies the
computer system’s AGP 1.5V or 3.3V bus power with a
standard buck converter. The linear controllers regulate
power for the 1.5V GTL bus and the 1.8V power for the
North/South Bridge core voltage and/or cache memory
circuits.
The HIP6020 includes an Intel-compatible, TTL 5-input
digital-to-analog converter (DAC) that adjusts the core PWM
output voltage from 1.3VDC to 2.05VDC in 0.05V steps and
from 2.1VDC to 3.5VDC in 0.1V increments. The precision
reference and voltage-mode control provide ±1% static
regulation. The second PWM controller’s output is user-
selectable, through a TTL-compatible signal applied at the
SELECT pin, for levels of 1.5V or 3.3V with ±3% accuracy.
The linear regulators use external N-Channel MOSFETs or
bipolar NPN pass transistors to provide fixed output voltages
of 1.5V ±3% (VOUT3) and 1.8V ±3% (VOUT4).
The HIP6020 monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controllers’ over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
rDS(ON), eliminating the need for a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HIP6020CB
0 to 70 28 Ld SOIC
HIP6020EVAL1 Evaluation Board
PKG.
NO.
M28.3
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, AGP Bus, North/South Bridge
and/or Cache Memory, and GTL Bus Power
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors
• Simple Single-Loop Control Designs
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifiers
- Full 0% to 100% Duty Ratios
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- AGP Bus PWM Output: ±3% Over Temperature
- Other Outputs: ±3% Over Temperature
• TTL-Compatible 5 Bit DAC Microprocessor Core Output
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3VDC to 3.5VDC
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Switching Regulators Do Not Require Extra Current
Sensing Elements, Use MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable From
50kHz to Over 1MHz
- Small External Component Count
Applications
Motherboard Power Regulation for Computers
Pinout
HIP6020 (SOIC)
TOP VIEW
UGATE2 1
PHASE2 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
PGOOD 8
OCSET2 9
VSEN2 10
SELECT 11
SS 12
FAULT/RT 13
VSEN4 14
28 VCC
27 UGATE1
26 PHASE1
25 LGATE1
24 PGND
23 OCSET1
22 VSEN1
21 FB1
20 COMP1
19 VSEN3
18 DRIVE3
17 GND
16 VAUX
15 DRIVE4
2-281
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 Page





HIP6020EVAL1 pdf, ピン配列
HIP6020
Simplified Power System Diagram
+5VIN
VOUT2
Q3
PWM2
CONTROLLER
PWM1
CONTROLLER
+3.3VIN
VOUT3
Q4
HIP6020
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
Q2
Q5
VOUT4
Typical Application
+12VIN
+5VIN
LIN
CIN
VOUT2
1.5V OR 3.3V
LOUT2
Q3
OCSET2
UGATE2
PHASE2
COUT2
CR2
TYPEDET
+3.3VIN
VOUT3
1.5V
COUT3
VSEN2
SELECT
VAUX
Q4 DRIVE3
VSEN3
VOUT4
1.8V
COUT4
Q5
DRIVE4
VSEN4
CSS
SS
VCC
HIP6020
GND
OCSET1
PGOOD
UGATE1
PHASE1
LGATE1
PGND
VSEN1
FB1
COMP1
POWERGOOD
Q1
LOUT1
VOUT1
1.3V TO 3.5V
Q2 COUT1
FAULT / RT
VID0
VID1
VID2
VID3
VID4
2-283


3Pages


HIP6020EVAL1 電子部品, 半導体
HIP6020
SS (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the converter.
FAULT / RT (Pin 13)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (RT) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs 200KHz + -R5----T-×---(--1k---0----6--)
(RT to GND)
Conversely, connecting a pull-up resistor (RT) from this pin
to VCC reduces the switching frequency according to the
following equation:
Fs 200KHz R-4----T-×---(--1k---0----7--)
(RT to 12V)
Nominally, the voltage at this pin is 1.26V. In the event of an
over-voltage or over-current condition, this pin is internally
pulled to VCC.
PGOOD (Pin 8)
PGOOD is an open collector output used to indicate the
status of the output voltages. This pin is pulled low when the
synchronous regulator output is not within ±10% of the
DACOUT reference voltage or when any of the other outputs
are below their under-voltage thresholds.
The PGOOD output is open for ‘11111’ VID code.
VID0, VID1, VID2, VID3, VID4 (Pins 7, 6, 5, 4 and 3)
VID0-4 are the TTL-compatible input pins to the 5-bit DAC.
The logic states of these five pins program the internal
voltage reference (DACOUT). The level of DACOUT sets the
microprocessor core converter output voltage, as well as the
coresponding PGOOD and OVP thresholds.
OCSET1, OCSET2 (Pins 23 and 9)
Connect a resistor (ROCSET) from this pin to the drain of the
respective upper MOSFET. ROCSET, an internal 200µA
current source (IOCSET), and the upper MOSFET’s on-
resistance (rDS(ON)) set the converter over-current (OC) trip
point according to the following equation:
IPEAK = I--O-----C----S----Er--D--T---S--×--(--OR----N-O---)--C----S----E----T-
An over-current trip cycles the soft-start function.
The voltage at OCSET1 pin is monitored for power-on reset
(POR) purposes.
PHASE1, PHASE2 (Pins 26 and 2)
Connect the PHASE pins to the respective PWM converter’s
upper MOSFET source. These pins represent the gate drive
return current path and are used to monitor the voltage drop
across the upper MOSFETs for over-current protection.
UGATE1, UGATE2 (Pins 27 and 1)
Connect UGATE pins to the respective PWM converter’s
upper MOSFET gate. These pins provide the gate drive for
the upper MOSFETs.
LGATE1 (Pin 25)
Connect LGATE1 to the synchronous PWM converter’s
lower MOSFET gate. This pin provides the gate drive for the
lower MOSFET.
COMP1 and FB1 (Pins 20, and 21)
COMP1 and FB1 are the available external pins of the
synchronous PWM regulator error amplifier. The FB1 pin is
the inverting input of the error amplifier. Similarly, the
COMP1 pin is the error amplifier output. These pins are
used to compensate the voltage-mode control feedback loop
of the synchronous PWM converter.
VSEN1 (Pin 22)
This pin is connected to the synchronous PWM converters’
output voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for over-
voltage protection.
VSEN2 (Pin 10)
Connect this pin to the output of the standard buck PWM
regulator. The voltage at this pin is regulated to the level
predetermined by the logic-level status of the SELECT pin.
This pin is also monitored by the PGOOD comparator circuit.
SELECT (Pin 11)
This pin determines the output voltage of the AGP bus
switching regulator. A low TTL input sets the output voltage
to 1.5V, while a high input sets the output voltage to 3.3V.
DRIVE3 (Pin 18)
Connect this pin to the gate of an external MOSFET. This pin
provides the drive for the 1.5V regulator’s pass transistor.
VSEN3 (Pin 19)
Connect this pin to the output of the 1.5V linear regulator.
This pin is monitored for undervoltage events.
DRIVE4 (Pin 15)
Connect this pin to the gate of an external MOSFET. This pin
provides the drive for the 1.8V regulator’s pass transistor.
VSEN4 (Pin 14)
Connect this pin to the output of the linear 1.8V regulator.
This pin is monitored for undervoltage events.
Description
Operation
The HIP6020 monitors and precisely controls 4 output voltage
levels (Refer to Figures 1, 2, and 3). It is designed for
microprocessor computer applications with 3.3V, 5V, and 12V
bias input from an ATX power supply. The IC has 2 PWM and
2-286

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部品番号部品説明メーカ
HIP6020EVAL1

Advanced Dual PWM and Dual Linear Power Controller

Intersil Corporation
Intersil Corporation


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