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PDF HIP4080A Data sheet ( Hoja de datos )
| Número de pieza | HIP4080A | |
| Descripción | High Frequency Full Bridge FET Driver | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
July 2004
HIP4080A
FN3658.7
80V/2.5A Peak, High Frequency Full Bridge
FET Driver
The HIP4080A is a high frequency, medium voltage Full
Bridge N-Channel FET driver IC, available in 20 lead plastic
SOIC and DIP packages. The HIP4080A includes an input
comparator, used to facilitate the “hysteresis” and PWM
modes of operation. Its HEN (high enable) lead can force
current to freewheel in the bottom two external power
MOSFETs, maintaining the upper power MOSFETs off.
Since it can switch at frequencies up to 1MHz, the HIP4080A
is well suited for driving Voice Coil Motors, switching power
amplifiers and power supplies.
HIP4080A can also drive medium voltage brush motors, and
two HIP4080As can be used to drive high performance
stepper motors, since the short minimum “on-time” can
provide fine micro-stepping capability.
Short propagation delays of approximately 55ns maximize
control loop crossover frequencies and dead-times which
can be adjusted to near zero to minimize distortion, resulting
in precise control of the driven load.
The similar HIP4081A IC allows independent control of all 4
FETs in a Full Bridge configuration.
The Application Note for the HIP4080A is AN9404.
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE (°C)
PACKAGE
PKG.
DWG. #
HIP4080AIPZ
(Note 1)
-40 to +85
20 Ld PDIP
(Pb-Free)
E20.3
HIP4080AIP
-40 to +85
20 Ld PDIP
E20.3
HIP4080AIB
-40 to +85
20 Ld SOIC
M20.3
HIP4080AIBZ
(Note 1)
-40 to +85
20 Ld SOIC
(Pb-Free)
M20.3
NOTES:
1. Intersil Pb-Free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-Free products are MSL
classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
2. Add “T” suffix for Tape and Reel packing option. HIP4080AIP not
available in Tape and Reel.
Features
• Drives N-Channel FET Full Bridge Including High Side
Chop Capability
• Bootstrap Supply Max Voltage to 95VDC
• Drives 1000pF Load at 1MHz in Free Air at +50°C with
Rise and Fall Times of Typically 10ns
• User-Programmable Dead Time
• Charge-Pump and Bootstrap Maintain Upper Bias
Supplies
• DIS (Disable) Pin Pulls Gates Low
• Input Logic Thresholds Compatible with 5V to 15V Logic
Levels
• Very Low Power Consumption
• Undervoltage Protection
• Pb-Free Available as an Option
Applications
• Medium/Large Voice Coil Motors
• Full Bridge Power Supplies
• Switching Power Amplifiers
• High Performance Motor Controls
• Noise Cancellation Systems
• Battery Powered Vehicles
• Peripherals
• U.P.S.
Pinout
HIP4080A
(PDIP, SOIC)
TOP VIEW
BHB 1
HEN 2
DIS 3
VSS 4
OUT 5
IN+ 6
IN- 7
HDEL 8
LDEL 9
AHB 10
20 BHO
19 BHS
18 BLO
17 BLS
16 VDD
15 VCC
14 ALS
13 ALO
12 AHS
11 AHO
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1995, Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
HIP4080A
Electrical Specifications
PARAMETERS
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K, and
TA = +25°C, Unless Otherwise Specified (Continued)
TJ = +25°C
TJ = - 40°C
TO +125°C
SYMBOL
TEST CONDITIONS
MIN TYP MAX MIN MAX UNITS
Voltage Gain
AVOL
10 25 - 10 - V/mV
OUT High Level Output Voltage
VOH
IN+ > IN-, IOH = -250µA
VDD
-0.4
-
- VDD -
- 0.5
V
OUT Low Level Output Voltage
Low Level Output Current
High Level Output Current
INPUT PINS: DIS
VOL
IOL
IOH
IN+ < IN-, IOL = +250µA
VOUT = 6V
VOUT = 6V
- - 0.4 - 0.5 V
6.5 14 19 6 20 mA
-17 -10 -3 -20 -2.5 mA
Low Level Input Voltage
High Level Input Voltage
Input Voltage Hysteresis
VIL Full Operating Conditions
VIH Full Operating Conditions
- - 1.0 - 0.8 V
2.5 -
- 2.7 -
V
- 35 - - - mV
Low Level Input Current
High Level Input Current
INPUT PINS: HEN
IIL VIN = 0V, Full Operating Conditions
IIH VIN = 5V, Full Operating Conditions
-130 -100 -75 -135 -65
-1 - +1 -10 +10
µA
µA
Low Level Input Voltage
High Level Input Voltage
Input Voltage Hysteresis
VIL Full Operating Conditions
VIH Full Operating Conditions
- - 1.0 - 0.8 V
2.5 -
- 2.7 -
V
- 35 - - - mV
Low Level Input Current
IIL
High Level Input Current
IIH
TURN-ON DELAY PINS: LDEL AND HDEL
VIN = 0V, Full Operating Conditions
VIN = 5V, Full Operating Conditions
-260
-1
-200
-
-150
+1
-270
-10
-130
+10
µA
µA
LDEL, HDEL Voltage
VHDEL,V IHDEL = ILDEL = -100µA
GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO
4.9 5.1 5.3 4.8 5.4
V
Low Level Output Voltage
High Level Output Voltage
Peak Pullup Current
Peak Pulldown Current
Under Voltage, Rising Threshold
VOL
IOUT = 100mA
VCC - VOH IOUT = -100mA
IO+ VOUT = 0V
IO- VOUT = 12V
UV+
0.7 0.85 1.0 0.5 1.1
0.8 0.95 1.1 0.5 1.2
1.7 2.6 3.8 1.4 4.1
1.7 2.4 3.3 1.3 3.6
8.1 8.8 9.4 8.0 9.5
V
V
A
A
V
Under Voltage, Falling Threshold
UV-
7.6 8.3 8.9 7.5 9.0
V
Under Voltage, Hysteresis
HYS
0.25 0.4 0.65 0.2 0.7
V
5
5 Page 
HIP4080A
Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL =
10K, and TA = +25°C, Unless Otherwise Specified
450 80
70
425
60
400 50
375
350
-50
-25
0 25 50 75 100
JUNCTION TEMPERATURE (°C)
FIGURE 16. TREF-PW REFRESH PULSE WIDTH vs
TEMPERATURE
125 150
40
30
20
-40
-20
0 20 40 60 80 100
JUNCTION TEMPERATURE (°C)
120
FIGURE 17. DISABLE TO LOWER ENABLE TDLPLH
PROPAGATION DELAY vs TEMPERATURE
90.0
80.0
70.0
60.0
50.0
40.0
-40 -20
0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
FIGURE 18. UPPER TURN-OFF PROPAGATION DELAY THPHL
vs TEMPERATURE
90.0
80.0
70.0
60.0
50.0
40.0
-40 -20
0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
FIGURE 19. UPPER TURN-ON PROPAGATION DELAY THPLH
vs TEMPERATURE
90.0
80.0
70.0
60.0
50.0
40.0
-40 -20
0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
FIGURE 20. LOWER TURN-OFF PROPAGATION DELAY TLPHL
vs TEMPERATURE
11
90.0
80.0
70.0
60.0
50.0
40.0
-40 -20
0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
FIGURE 21. LOWER TURN-ON PROPAGATION DELAY TLPLH
vs TEMPERATURE
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet HIP4080A.PDF ] | |
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